SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 191

• Manufacturer Part Number: SAM9G25
• Manufacturer: Atmel Corporation

Specifications of SAM9G25

• Flash (kbytes): 0 Kbytes
• Pin Count: 247
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

A.2
ARM DDI0198D
AHB related signals
Table A-1 describes the ARM926EJ-S processor AHB related signals.
Signal name
DHADDR[31:0]
DHBL[3:0]
DHBURST[2:0]
DHBUSREQ
DHCLKEN
DHGRANT
DHLOCK
DHPROT[3:0]
DHRDATA[31:0]
DHREADY
DHRESP[1:0]
DHSIZE[2:0]
DHTRANS[1:0]
DHWDATA[31:0]
DHWRITE
HRESETn
IHADDR[31:0]
IHBURST[2:0]
IHBUSREQ
IHCLKEN
Copyright © 2001-2003 ARM Limited. All rights reserved.
Direction
Output
Output
Output
Output
Input
Input
Output
Output
Input
Input
Input
Output
Output
Output
Output
Input
Output
Output
Output
Input
Description
AHB address (data).
Byte lane indicator for current transfer.
AHB burst size (data).
AHB bus request (data).
Signifies the rising edge of HCLK for the data AHB. If
CLK and HCLK are the same frequency, DHCLKEN
must be tied HIGH.
AHB bus grant signal (data).
AHB bus lock signal (data).
AHB bus access information (data).
AHB read data (data).
AHB transfer complete signal (data).
AHB transfer response (data).
AHB transfer size (data), indicating byte, halfword, or
word. DHSIZE[2] is tied LOW.
AHB transfer type (data).
AHB write data (data).
AHB transfer direction (data).
AHB reset signal.
AHB address (instruction).
AHB burst size. (instruction).
AHB bus request (instruction).
Signifies the rising edge of HCLK for the data AHB. If
CLK and HCLK are the same frequency, IHCLKEN
must be tied HIGH.
Table A-1 AHB related signals
Signal Descriptions
A-3