SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 132
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 132 of 290
- Download datasheet (5Mb)
ARM9E-S Coprocessor Interface
6.8
6-16
CDP: ARM processor pipeline
Privileged instructions
LATECANCEL
INSTR[31:0]
CHSD[1:0]
CHSE[1:0]
InTRANS
/InM[4:0]
InMREQ
PASS
CLK
Mode change
The coprocessor might restrict certain instructions for use in privileged modes only. To
do this, the coprocessor has to track the InTRANS output. Figure 6-8 shows how
InTRANS changes after a mode change.
The first two CHSD responses are ignored by the ARM9E-S because it is only the final
CHSD response, as the instruction moves from Decode into Execute, that counts. This
allows the coprocessor to change its response as InTRANS/InM changes.
Copyright © 2000 ARM Limited. All rights reserved.
Figure 6-8 ARM9E-S privileged instructions
ARM DDI 0165B
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