SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 282
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SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 282 of 290
- Download datasheet (5Mb)
Debug in depth
C.13.2 DBGRNG signal
C-42
Take, for example, the request by a debugger to breakpoint on the instruction at location
YYY when running process XXX in a multiprocess system. If the current process ID is
stored in memory, you can implement the above function with a watchpoint and
breakpoint chained together. The watchpoint address points to a known memory
location containing the current process ID, the watchpoint data points to the required
process ID, and the ENABLE bit is set to off.
The address comparator output of the watchpoint is used to drive the write enable for
the CHAINOUT latch. The input to the latch is the output of the data comparator from
the same watchpoint. The output of the latch drives the CHAIN input of the breakpoint
comparator. The address YYY is stored in the breakpoint register, and when the
CHAIN input is asserted, the breakpoint address matches, and the breakpoint triggers
correctly.
The DBGRNG signal is derived as follows:
DBGRNG = ((({Av[31:0],Cv[4,2:0]} XNOR {A[31:0],C[4,2:0]}) OR
{Am[31:0],Cm[4:0]}) == 0xFFFFFFFFF) AND
((({Dv[31:0],Cv[7:5]} XNOR {D[31:0],C[7:5]}) OR
Dm[31:0],Cm[7:5]}) == 0x7FFFFFFFF)
The RANGE input to Watchpoint unit 0 is derived as the address comparison of
Watchpoint unit 1, that is:
RANGEIN = ((Av[31:0] XNOR A[31:0]) OR Am[31:0] == 0xFFFF FFFF)
This RANGE input allows you to couple two breakpoints together to form range
breakpoints.
Selectable ranges are restricted to being powers of 2. For example, if a breakpoint is to
occur when the address is in the first 256 bytes of memory, but not in the first 32 bytes,
program the watchpoint registers as follows:
For Watchpoint 1:
1.
2.
3.
Program Watchpoint 1 with an address value of
mask of
Clear the ENABLE bit.
Program all other Watchpoint 1 registers as normal for a breakpoint.
An address within the first 32 bytes causes the RANGE output to go HIGH
because the address matches, but does not trigger the breakpoint because the
ENABLE is LOW.
Copyright © 2000 ARM Limited. All rights reserved.
0X0000001F
.
0x00000000
and an address
ARM DDI 0165B
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