SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 1072
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SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
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39.4.3
39.4.4
39.5
39.5.1
39.5.1.1
39.5.1.2
1072
1072
Functional Description
SAM3X/A
SAM3X/A
Interrupts
USB Pipe/Endpoint x FIFO Data Register (USBFIFOxDATA)
USB General Operation
Introduction
Power-On and Reset
For normal mode:
For low-power mode:
The UOTGHS interrupt request line is connected to the interrupt controller. Using the UOTGHS
interrupt requires the interrupt controller to be programmed first.
The application has access to each Pipe/Endpoint FIFO through its reserved
space. The application can access a 64 KB buffer linearly or fixedly as the DPRAM address
increment is fully handled by hardware. Byte, half-word and word access are supported. Data
should be accessed in a big-endian way.
Disabling the UOTGHS (by writing a zero to the UOTGHS_CTRL.USBE bit) does not reset the
DPRAM.
After a hardware reset, the UOTGHS is disabled. When enabled, the UOTGHS runs either in
device mode or in host mode according to the ID detection.
If the UOTGID pin is not connected to the ground, the UOTGID Pin State bit in the General Sta-
tus register (UOTGHS_SR.ID) is set (the internal pull-up resistor of the UOTGID pin must be
enabled by the I/O Controller) and device mode is engaged.
The UOTGHS_SR.ID bit is cleared when a low level has been detected on the UOTGID pin.
Host mode is then engaged.
Figure 39-5 on page 1073
1. Enable the UPLL 480 MHz
2. Wait for the UPLL 480 MHz to be considered as locked by the PMC
3. Enable the UOTGHS Peripheral clock (PMC_PCER)
4. The UOTGHS will use USB_480 M clock (refer to the PMC).
1. As USB_48M must be set to 48 MHz (refer to the PMC), select either the PLLA or the
2. Enable the UOTGCK bit (PMC_SCER)
3. Enable the UOTGHS Peripheral clock (PMC_PCER)
4. Put the UOTGHS in Low power mode (SPDCONF)
UPLL (previously set to ON), and program the PMC_USB register (source selection
and divider)
describes the UOTGHS main states.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
32
KB address
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