SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 967
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SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
- Current page: 967 of 1465
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The NOTBUSY flag allows to deal with these different states.
0: The HSMCI is not ready for new data transfer. Cleared at the end of the card response.
1: The HSMCI is ready for new data transfer. Set when the busy state on the data line has ended. This corresponds to a
free internal data receive buffer of the card.
Refer to the MMC or SD Specification for more details concerning the busy behavior.
• SDIOIRQA: SDIO Interrupt for Slot A
0: No interrupt detected on SDIO Slot A.
1: An SDIO Interrupt on Slot A occurred. Cleared when reading the HSMCI_SR.
• SDIOIRQB: SDIO Interrupt for Slot B
0: No interrupt detected on SDIO Slot B.
1: An SDIO Interrupt on Slot B occurred. Cleared when reading the HSMCI_SR.
• SDIOWAIT: SDIO Read Wait Operation Status
0: Normal Bus operation.
1: The data bus has entered IO wait state.
• CSRCV: CE-ATA Completion Signal Received
0: No completion signal received since last status read operation.
1: The device has issued a command completion signal on the command line. Cleared by reading in the HSMCI_SR
register.
• RINDE: Response Index Error
0: No error.
1: A mismatch is detected between the command index sent and the response index received. Cleared when writing in the
HSMCI_CMDR.
• RDIRE: Response Direction Error
0: No error.
1: The direction bit from card to host in the response has not been detected.
• RCRCE: Response CRC Error
0: No error.
1: A CRC7 error has been detected in the response. Cleared when writing in the HSMCI_CMDR.
• RENDE: Response End Bit Error
0: No error.
1: The end bit of the response has not been detected. Cleared when writing in the HSMCI_CMDR.
• RTOE: Response Time-out Error
0: No error.
1: The response time-out set by MAXLAT in the HSMCI_CMDR has been exceeded. Cleared when writing in the
HSMCI_CMDR.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
SAM3X/A
SAM3X/A
967
967
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