SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 991
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SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
- Current page: 991 of 1465
- Download datasheet (26Mb)
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Besides generating output signals OCx, the comparator generates interrupts in function of the
counter value. When the output waveform is left aligned, the interrupt occurs at the end of the
counter period. When the output waveform is center aligned, the bit CES of the PWM_CMRx
register defines when the channel counter interrupt occurs. If CES is set to 0, the interrupt
occurs at the end of the counter period. If CES is set to 1, the interrupt occurs at the end of the
counter period and at half of the counter period.
Figure 38-5 “Waveform Properties”
configuration.
illustrates the counter interrupts in function of the
SAM3X/A
SAM3X/A
991
991
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