SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 807
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SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
- Current page: 807 of 1465
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35.7.5.3
Figure 35-35. IrDA Demodulator Operations
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Receiver
Counter
Value
Input
MCK
RXD
IrDA Demodulator
6
Rejected
5
Pulse
4
Table 35-13. IrDA Baud Rate Error (Continued)
The demodulator is based on the IrDA Receive filter comprised of an 8-bit down counter which is
loaded with the value programmed in US_IF. When a falling edge is detected on the RXD pin,
the Filter Counter starts counting down at the Master Clock (MCK) speed. If a rising edge is
detected on the RXD pin, the counter stops and is reloaded with US_IF. If no rising edge is
detected when the counter reaches 0, the input of the receiver is driven low during one bit time.
Figure 35-35
As the IrDA mode uses the same logic as the ISO7816, note that the FI_DI_RATIO field in
US_FIDI must be set to a value higher than 0 in order to assure IrDA communications operate
correctly.
Peripheral Clock
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
3
2
6
illustrates the operations of the IrDA demodulator.
6
5
Baud Rate
4
Accepted
57 600
38 400
38 400
38 400
38 400
19 200
19 200
19 200
19 200
Pulse
9 600
9 600
9 600
9 600
2 400
2 400
2 400
3
2
1
0
107
130
130
213
260
521
853
CD
43
33
53
65
12
65
24
96
6
Baud Rate Error
0.93%
0.00%
1.38%
0.63%
0.16%
0.00%
0.16%
0.31%
0.16%
0.00%
0.16%
0.16%
0.16%
0.00%
0.03%
0.04%
SAM3X/A
SAM3X/A
Pulse Time
19.53
19.53
19.53
19.53
78.13
78.13
78.13
3.26
4.88
4.88
4.88
4.88
9.77
9.77
9.77
9.77
807
807
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