SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 723
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SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
- Current page: 723 of 1465
- Download datasheet (26Mb)
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Figure 33-16. TWI Write Operation with Single Data Byte and Internal Address
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size (IADRSZ)
- Device slave address (DADR)
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
Write ==> bit MREAD = 0
TWI_THR = Data to send
Set the internal address
Set the Control register:
Write STOP command
TWI_IADR = address
- Transfer direction bit
Load transmit register
Read Status register
Read Status register
(Needed only once)
TWI_CR = STOP
Transfer finished
Yes
- Master enable
TXCOMP = 1?
Set TWI clock
TXRDY = 1?
Yes
BEGIN
No
No
SAM3X/A
SAM3X/A
723
723
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