SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 35

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SAM3SD8B

Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
Datasheets
10.6
11090AS–ATARM–10-Feb-12
Power Management Controller
Figure 10-2. Clock Generator Block Diagram
The Power Management Controller provides all the clock signals to the system. It provides:
The Supply Controller selects between the 32 kHz RC oscillator or the crystal oscillator. The
unused oscillator is disabled automatically so that power consumption is optimized.
By default, at startup the chip runs out of the Master Clock using the fast RC oscillator running at
4 MHz.
The user can trim the 8 and 12 MHz RC Oscillator frequency by software.
• the Processor Clock, HCLK
• the Free running processor clock, FCLK
• the Cortex SysTick external clock
• the Master Clock, MCK, in particular to the Matrix and the memory interfaces
• the USB Clock, UDPCK
• independent peripheral clocks, typically at the frequency of MCK
• three programmable clock outputs: PCK0, PCK1 and PCK2
XOUT32
XIN32
XOUT
XIN
Clock Generator
Management
32k RC OSC
12/8/4 MHz
Slow Clock
12M Main
Controller
Oscillator
Divider A
Status
PLL and
Oscillator
On Chip
RC OSC
PLL and
Divider B
On Chip
Power
Control
SAM3S8/SD8 Summary
MAINSEL
XTALSEL
PLLA Clock
PLLACK
Slow Clock
SLCK
PLLB Clock
PLLBCK
Main Clock
MAINCK
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