SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 1068

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SAM3X8C

Manufacturer Part Number
SAM3X8C
Description
Manufacturer
Atmel Corporation
Datasheets
39.3
Figure 39-1. UOTGHS Block Diagram
1068
1068
APB bus
AHB bus
AHB bus
Block Diagram
SAM3X/A
SAM3X/A
PMC
Master
Slave
AHB
Multiplexer
MCK
The UOTGHS provides a hardware device to interface a USB link to a data flow stored in a dual-
port RAM (DPRAM).
In normal operation (SPDCONF = 1), the UTMI transceiver requires the UTMI PLL (480 MHz). In
case of Full or Low speed only, for a lower consumption (SPDCONF = 0), the UTMI transceiver
only requires 48 MHz.
USB_48M Clock (needed only when SPDCONF=1)
USB_480M Clock (needed only when SPDCONF=0)
AHB1
AHB0
Local
AHB
Slave
interface
DMA
Rd/Wr/Ready
32 bits
System Clock
Domain
status
APB
Interface
ctrl
DPRAM
USB2.0
CORE
PEP
Alloc
USB Clock
Domain
16/8 bits
UTMI
Controller
OTG
I/O
DFSDM
DFSDP
DHSDP
DHSDM
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
VBUS
UOTGID
UOTGVBOF
DP
DM

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