SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 1291

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SAM3X8C

Manufacturer Part Number
SAM3X8C
Description
Manufacturer
Atmel Corporation
Datasheets
41.6.7
Name:
Address:
Access:
This register, when read, provides details of the status of a receive. Once read, individual bits may be cleared by writing 1
to them. It is not possible to set a bit to 1 by writing to the register.
• BNA: Buffer Not Available
An attempt was made to get a new buffer and the pointer indicated that it was owned by the processor. The DMA rereads
the pointer each time a new frame starts until a valid pointer is found. This bit is set at each attempt that fails even if it has
not had a successful pointer read since it has been cleared.
Cleared by writing a one to this bit.
• REC: Frame Received
One or more frames have been received and placed in memory. Cleared by writing a one to this bit.
• OVR: Receive Overrun
The DMA block was unable to store the receive frame to memory, either because the bus was not granted in time or
because a not OK hresp(bus error) was returned. The buffer is recovered if this happens.
Cleared by writing a one to this bit.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
7
Receive Status Register
EMAC_RSR
0x400B0020
Read-write
30
22
14
6
29
21
13
5
28
20
12
4
27
19
11
3
OVR
26
18
10
2
REC
25
17
9
1
SAM3X/A
SAM3X/A
BNA
24
16
8
0
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