SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 615
SAM3X8C
Manufacturer Part Number
SAM3X8C
Description
Manufacturer
Atmel Corporation
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• CKG: Receive Clock Gating Selection
• START: Receive Start Selection
• STOP: Receive Stop Selection
0 = After completion of a data transfer when starting with a Compare 0, the receiver stops the data transfer and waits for a
new compare 0.
1 = After starting a receive with a Compare 0, the receiver operates in a continuous mode until a Compare 1 is detected.
• STTDLY: Receive Start Delay
If STTDLY is not 0, a delay of STTDLY clock cycles is inserted between the start event and the actual start of reception.
When the Receiver is programmed to start synchronously with the Transmitter, the delay is also applied.
Note: It is very important that STTDLY be set carefully. If STTDLY must be set, it should be done in relation to TAG
(Receive Sync Data) reception.
• PERIOD: Receive Period Divider Selection
This field selects the divider to apply to the selected Receive Clock in order to generate a new Frame Sync Signal. If 0, no
PERIOD signal is generated. If not 0, a PERIOD signal is generated each 2 x (PERIOD+1) Receive Clock.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Value
Value
3-7
0
1
2
0
1
2
3
4
5
6
7
8
Name
NONE
CONTINUOUS
TRANSFER
Name
CONTINUOUS
TRANSMIT
RF_LOW
RF_HIGH
RF_FALLING
RF_RISING
RF_LEVEL
RF_EDGE
CMP_0
Description
None
Continuous Receive Clock
Receive Clock only during data transfers
Reserved
Description
Continuous, as soon as the receiver is enabled, and
immediately after the end of transfer of the previous data.
Transmit start
Detection of a low level on RF signal
Detection of a high level on RF signal
Detection of a falling edge on RF signal
Detection of a rising edge on RF signal
Detection of any level change on RF signal
Detection of any edge on RF signal
Compare 0
RK Pin
Input-only
Output
Output
SAM3X/A
SAM3X/A
615
615
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