CS8422-CNZ Cirrus Logic Inc, CS8422-CNZ Datasheet - Page 43

• Manufacturer Part Number: CS8422-CNZ
• Description: IC SAMPLE RATE CONVERTER 32QFN
• Manufacturer: Cirrus Logic Inc
• Type: Sample Rate Converterr

Specifications of CS8422-CNZ

• Package / Case: 32-QFN
• Applications: Digital Audio
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Mounting Style: SMD/SMT
• Package: 32QFN
• Operating Temperature: -55 to 125 °C
• Audio Control Type: Sample Rate Converter
• Control Interface: I2C, SPI
• Supply Voltage Range: 1.71V To 5.25V
• Operating Temperature Range: -40°C To +85°C
• Audio Ic Case Style: QFN
• No. Of Pins: 32
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1568 - BOARD EVAL FOR CS8422 RCVR
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1732

DS692F1
9.1.2
9.1.3
SDA
SCL
SDA
SCL
START
The MAP is an 8-bit word containing the control port address to be read or written in both SPI and I²C Modes
and a bit to control an auto-increment feature. MAP[6:0] constitute the address to be read or written, while
bit 7 of the MAP (INC) determines whether or not MAP[6:0] will automatically increment after each control
port read or write. If INC = 0, MAP[6:0] will not automatically increment after each control port read or write.
If INC = 1, MAP[6:0] will automatically increment after each control port read or write. The MAP byte is
shown in
START
I²C Mode
In I²C Mode, SDA is a bidirectional data line. Data is clocked into and out of the part by the clock, SCL.
There is no CS pin. Pins AD0 and AD1 form the two least significant bits of the chip address and should
be connected to VL or DGND as desired. The GPO2 pin is used to set the AD2 bit by connecting a 20 k
resistor from the GPO2 pin to VL (a 20 k pull-up sets AD2 = 1, and the absence of a pull-up sets
AD2 = 0). The states of the pins are sensed after RST is released.
The signal timings for a read and write cycle are shown in
defined as a falling transition of SDA while the clock is high. A Stop condition is a rising transition while
the clock is high. All other transitions of SDA occur while the clock is low. The first byte sent to the CS8422
after a Start condition consists of a 7-bit chip address field and a R/W bit (high for a read, low for a write).
The upper 4 bits of the 7-bit address field are fixed at 0010.
To communicate with a CS8422, the chip address field, which is the first byte sent to the CS8422, should
match 0010 followed by the settings of the AD2, AD1, and AD0 pins. The eighth bit of the address is the
R/W bit. If the operation is a write, the next byte includes the Memory Address Pointer (MAP) which se-
lects the register to be read or written. If the operation is a read, the contents of the register pointed to by
the MAP will be output. Each byte is separated by an acknowledge bit (ACK). The ACK bit is output from
the CS8422 after each input byte is read, and is input to the CS8422 from the microcontroller after each
transmitted byte.
Note that the read operation can not set the MAP so an aborted write operation is used as a preamble.
As shown in
a stop condition.
Memory Address Pointer (MAP)
0 0 1 0 AD2 AD1 AD0 0
0 0 1 0 AD2 AD1 AD0 0
0
0
CHIP ADDRESS (WRITE)
CHIP ADDRESS (WRITE)
1
1
2
Figures 23
2
3
3
4
Figure
4
5
6
5
Figure 23. Control Port Timing, I²C Slave Mode Write
Figure 24. Control Port Timing, I²C Slave Mode Read
and 24.
7
24, the write operation is aborted after the acknowledge for the MAP byte by sending
6
ACK
8
7
INC
9
ACK
8
10 11
6
INC
9
5
MAP BYTE
12 13 14 15
10 11
6
4
MAP BYTE
5
3
12
2
4
1
13 14 15
3
16
0
ACK
2
STOP
17 18
START
1
16 17 18
0
19
ACK
0 0 1 0 AD2 AD1 AD0 1
20 21 22 23 24
CHIP ADDRESS (READ)
7
19
6
DATA
Figure 23
24 25
1
0
25
ACK
26 27 28
26
ACK
and
27 28
7
7
DATA
DATA +1
6
Figure
0
ACK
1
DATA +1
0
24. A Start condition is
7
0
7
DATA +n
6
DATA + n
7
1
CS8422
0
0
ACK
NO
ACK
STOP
STOP
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