ST72324J6 STMicroelectronics, ST72324J6 Datasheet - Page 10

• Manufacturer Part Number: ST72324J6
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324J6

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• 16-bit Timer A With: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST72324Jx ST72324Kx
PIN DESCRIPTION (Cont’d)
For external pin connection guidelines, refer to See “ELECTRICAL CHARACTERISTICS” on page 116.
Legend / Abbreviations for
Type:
Input level:
In/Output level: C = CMOS 0.3V
Output level:
Port and control configuration:
Refer to
The RESET configuration of each pin is shown in bold. This configuration is valid as long as the device is
in reset state.
Table 1. Device Pin Description
10/164
1
10 5
11 6
12 7
13 8
14 9
15 10 3
16 11 4
17 12
18 13 5
19 14 6
20 15 7 10
21
22
23 16 8 11
6
7
8
9
– Input:
– Output:
Pin n°
1 30 1
2 31 2
3 32 3
4
1
2
“I/O PORTS” on page 45
4
5
6
7
8
9
PB4 (HS)
PD0/AIN0
PD1/AIN1
PD2/AIN2
PD3/AIN3
PD4/AIN4
PD5/AIN5
V
V
PF0/MCO/AIN8
PF1 (HS)/BEEP
PF2 (HS)
PF4/OCMP1_A/
AIN10
PF6 (HS)/ICAP1_A
PF7 (HS)/
EXTCLK_A
V
V
PC0/OCMP2_B/
AIN12
AREF
SSA
DD_0
SS_0
I = input, O = output, S = supply
A = Dedicated analog input
C
HS = 20mA high sink (on N-buffer only)
float = floating, wpu = weak pull-up, int = interrupt
OD = open drain
T
Pin Name
= CMOS 0.3V
Table
DD
DD
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
2)
for more details on the software configuration of the I/O ports.
S
S
S
S
1:
, PP = push-pull
/0.7V
/0.7V
Level
T
T
T
T
T
T
T
T
T
T
T
T
T
T
DD
DD
HS
HS
HS
HS
HS
with input trigger
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Input
ei3
ei1
ei1
ei1
Port
X
X
X
X
X
X
X
X
X
Output
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
, ana = analog ports
function
Port B4
Port D0
Port D1
Port D2
Port D3
Port D4
Port D5
Analog Reference Voltage for ADC
Analog Ground Voltage
Port F0
Port F1
Port F2
Port F4
Port F6
Port F7
Digital Main Supply Voltage
Digital Ground Voltage
Port C0
reset)
(after
Main
ADC Analog Input 0
ADC Analog Input 1
ADC Analog Input 2
ADC Analog Input 3
ADC Analog Input 4
ADC Analog Input 5
Main clock
out (f
Beep signal output
Timer A Out-
put Com-
pare 1
Timer A Input Capture 1
Timer A External Clock
Source
Timer B Out-
put Com-
pare 2
Alternate Function
CPU
)
ADC Analog
Input 8
ADC Analog
Input 10
ADC Analog
Input 12