ST72324J6 STMicroelectronics, ST72324J6 Datasheet - Page 99

• Manufacturer Part Number: ST72324J6
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324J6

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• 16-bit Timer A With: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

SERIAL COMMUNICATIONS INTERFACE (Cont’d)
10.5.5 Low Power Modes
Mode
HALT
WAIT
No effect on SCI.
SCI interrupts cause the device to exit from
Wait mode.
SCI registers are frozen.
In Halt mode, the SCI stops transmitting/re-
ceiving until Halt mode is exited.
Description
10.5.6 Interrupts
The SCI interrupt events are connected to the
same interrupt vector.
These events generate an interrupt if the corre-
sponding Enable Control Bit is set and the inter-
rupt mask in the CC register is reset (RIM instruc-
tion).
Transmit Data Register
Empty
Transmission Com-
plete
Received Data Ready
to be Read
Overrun Error Detect-
ed
Idle Line Detected
Parity Error
Interrupt Event
Event
TDRE
RDRF
ST72324Jx ST72324Kx
IDLE
Flag
OR
TC
PE
Control
Enable
TCIE
RIE
ILIE
TIE
PIE
Bit
from
Wait
Exit
Yes
Yes
Yes
Yes
Yes
Yes
99/164
from
Exit
Halt
No
No
No
No
No
No
1