ST72324J6 STMicroelectronics, ST72324J6 Datasheet - Page 56

• Manufacturer Part Number: ST72324J6
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324J6

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• 16-bit Timer A With: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST72324Jx ST72324Kx
10.2 MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK AND BEEPER (MCC/RTC)
The Main Clock Controller consists of three differ-
ent functions:
■
■
■
Each function can be used independently and si-
multaneously.
10.2.1 Programmable CPU Clock Prescaler
The programmable CPU clock prescaler supplies
the clock for the ST7 CPU and its internal periph-
erals. It manages SLOW power saving mode (See
Section 8.2 SLOW MODE
The prescaler selects the f
cy and is controlled by three bits in the MCCSR
register: CP[1:0] and SMS.
10.2.2 Clock-out Capability
The clock-out capability is an alternate function of
an I/O port pin that outputs the f
Figure 34. Main Clock Controller (MCC/RTC) Block Diagram
56/164
1
f
OSC2
a programmable CPU clock prescaler
a clock-out signal to supply external devices
a real time clock timer with interrupt capability
MCCBCR
MCCSR
DIV 2, 4, 8, 16
MCO
CP1 CP0
CPU
DIV 64
for more details).
main clock frequen-
CPU
SMS
1
0
clock to drive
BEEP SIGNAL
12-BIT MCC RTC
SELECTION
TB1 TB0 OIE
COUNTER
BC1 BC0
external devices. It is controlled by the MCO bit in
the MCCSR register.
CAUTION: When selected, the clock out pin sus-
pends the clock during ACTIVE-HALT mode.
10.2.3 Real Time Clock Timer (RTC)
The counter of the real time clock timer allows an
interrupt to be generated based on an accurate
real time clock. Four different time bases depend-
ing directly on f
functionality is controlled by four bits of the MCC-
SR register: TB[1:0], OIE and OIF.
When the RTC interrupt is enabled (OIE bit set),
the ST7 enters ACTIVE-HALT mode when the
HALT instruction is executed. See
TIVE-HALT AND HALT MODES
10.2.4 Beeper
The beep function is controlled by the MCCBCR
register. It can output three selectable frequencies
on the BEEP pin (I/O port alternate function).
OIF
MCC/RTC INTERRUPT
f
CPU
WATCHDOG
TIMER
TO
OSC2
are available. The whole
PERIPHERALS
for more details.
TO CPU AND
CPU CLOCK
BEEP
MCO
Section 8.4 AC-