ST7MC2M9 STMicroelectronics, ST7MC2M9 Datasheet - Page 162

• Manufacturer Part Number: ST7MC2M9
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
• Manufacturer: STMicroelectronics

Specifications of ST7MC2M9

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
10.6.6.10 Commutation Noise Filter
For D event detection and for Z event detection
(when SPLG bit is set while DS[3:0] bits are reset),
sampling is done at f
OFF time (“Sampling block” on page 159). To
avoid any erroneous detection due to PWM com-
mutation noise, an hardware filter of 1µs (for f
IPH
is put OFF has been implemented. This means
Table 34. Sensor/sensorless mode and D & Z event selection
Note: For f
162/309
1
SR
bit
0
0
0
0
1
= 4Mhz) when PWM is put ON and when PWM
SPLG
bit
0
1
0
1
x
DS[3:0]
equal to
equal to
SCF
bits
000
000
000
000
Not
Not
xxx
selection, see
not used
not used
not used
not used
Sensors
Sensors
Sensors
Sensors
Sensors
Position
Mode
used
SCF
during the PWM ON or
bits use
OS1 dis-
Enabled
Enabled
Enabled
Enabled
OS[2:0]
abled
Table 82
Z: SA&OT config.
Z: SA&OT config.
Event detection
sampling clock
PWM frequency
PWM frequency
D:
D:
D:
D:
Z:
Z:
Z:
f
f
f
f
f
f
f
SCF
SCF
SCF
SCF
SCF
SCF
SCF
PER-
During off time
behaviour for
the off time of
the PWM sig-
or ON time of
the PWM sig-
At the end of
PWM signal
PWM signal
PWM signal
During OFF
time or ON
During ON
During ON
that, with sampling at 1MHz (1µs), due to this filter,
1 sample are ignored directly after the commuta-
tion.
This filter is active all the time for the D event and
it is active for the Z event when the SPLG bit is set
and DS[3:0] bits are cleared (meaning that the Z
event is sampled at high frequency during the
PWM ON or OFF time).
time of the
time of the
time of the
Sampling
detection
Z event
nal
nal
No Z Window Filter
Only Z Event Filter
Event Filters
Sensor mode
Window and
is active in
and “after Z” behaviour
“between D and Z” be-
“between D and Z” be-
“between D and Z” be-
“between D and Z” be-
“Before D” behaviour,
“Before D” behaviour,
“Before D” behaviour,
“Before D” behaviour,
“Before Z” behaviour
haviour and “after Z”
haviour and “after Z”
haviour and “after Z”
haviour and “after Z”
Behaviour of the
output PWM
behaviour
behaviour
behaviour
behaviour