ST7MC2M9 STMicroelectronics, ST7MC2M9 Datasheet - Page 179

• Manufacturer Part Number: ST7MC2M9
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
• Manufacturer: STMicroelectronics

Specifications of ST7MC2M9

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

MOTOR CONTROLLER (Cont’d)
Table 40. Step Frequency/Period Range (4MHz)
Table 41. Modes of Accessing MTIM Timer-Related Registers
RST bit TES[1:0] SWA bit CKE bit
ST[3:0] in MPRSR
0
0
0
0
Step Ratio Bits
State of MCRA / MCRB / MPAR Register Bits
Register
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
00
00
01
10
11
xx
0
1
x
x
Step Frequency
Maximum
23.5 kHz
11.7 kHz
5.88 kHz
2.94 kHz
1.47 kHz
0.718 Hz
91.9 Hz
45.9 Hz
22.9 Hz
11.4 Hz
5.74 Hz
2.87 Hz
1.43 Hz
735 Hz
367 Hz
183 Hz
0
1
1
1
Speed Sensor Mode
Configuration Mode
Autoswitched Mode
Switched Mode
Mode
Step Frequency
Minimum
0.958 Hz
0.479 Hz
0.240 Hz
7.85 kHz
3.93 kHz
1.96 kHz
61.3 Hz
30.7 Hz
15.4 Hz
7.66 Hz
3.83 Hz
1.92 Hz
980 Hz
490 Hz
245 Hz
123 Hz
MTIM, MTIML,
MTIM, ST[3:0]
MTIM, ST[3:0]
Read Only
Access
ST[3:0]
Access to MTIM Timer Related Registers
Step Period
Minimum
1.36 ms
2.72 ms
10.9 ms
21.8 ms
43.6 ms
5.44 ms
Set by hardware, (increment or decre-
42.5
174 ms
349 ms
697 ms
MDREG, MCOMP, MZREG, MZPRV,
170
340
680
Set by hardware, (increment ST[3:0])
MCOMP, MDREG, MZREG, MZPRV
87 ms
1.40 s
85
ment ST[3:0]), cleared by software.
MTIM, MTIML, MZPRV, MZREG,
μ
μ
μ
μ
μ
s
MDREG,MZREG, MZPRV,
MCOMP, MDREG, ST[3:0]
s
s
s
s
RMI, RPI bit of MISR, :
ST7MC1xx/ST7MC2xx
Read / Write Access
RMI, RPI bit of MISR:
1: Decrement ST[3:0]
Cleared by software
1: Increment ST[3:0]
RMI bit of MISR:
RPI bit of MISR:
0: No action
0: No action
Step Period
Maximum
16.32 ms
127.5
1.02 ms
2.04 ms
4.08 ms
8.16 ms
32.6 ms
65.2 ms
130 ms
261 ms
522 ms
255
510
1.04 s
2.08 s
4.17 s
μ
μ
μ
s
s
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