ST72324BJ6 STMicroelectronics, ST72324BJ6 Datasheet - Page 158

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ST72324BJ6

Manufacturer Part Number
ST72324BJ6
Description
5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72324BJ6

Hdflash Endurance
1 kcycle at 55 °C, data retention 40 years at 85 °C
Clock Sources
crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
4 Power Saving Modes
Slow, Wait, Active-halt, and Halt
Electrical characteristics
12.9
12.9.1
Table 106. General characteristics
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
3. When the current limitation is not possible, the V
4. No negative current injection allowed on 8/16 Kbyte Flash devices
5. Static peak current value taken at a fixed V
6. The Schmitt trigger that is connected to every I/O port is disabled for analog inputs only when ADON bit is ON and the
7. The R
8. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
158/193
ΣI
I
INJ(PIN)
Symbol
INJ(PIN)
t
t
t
f(IO)out
r(IO)out
specification. A positive injection is induced by V
Section 12.2.2 on page 143
in production. This value depends on V
particular ADC channel is selected (with port configured in input floating mode). When the ADON bit is OFF, static current
consumption may result. This can be avoided by keeping the input voltage of this pin close to V
Figure
interrupt source.
w(IT)in
V
R
C
V
V
I
I
lkg
hys
PU
S
IH
IO
IL
PU
(3)
(3)
71).
pull-up equivalent resistor is based on a resistive transistor (corresponding I
Input low level voltage
(standard voltage devices)
Input high level voltage
Schmitt trigger voltage hysteresis
Injected current on I/O pins other than
pin PB0
Injected current on ROM and 32 Kbyte
Flash devices pin PB0
Injected current on 8/16 Kbyte Flash
devices pin PB0
Total injected current
(sum of all I/O and control pins)
Input leakage current
Static current consumption induced by
each floating input pin
Weak pull-up equivalent resistor
I/O pin capacitance
Output high to low level fall time
Output low to high level rise time
External interrupt pulse time
I/O port pin characteristics
General characteristics
Subject to general operating conditions for V
(4)
Parameter
for more details.
(1)
DD
(1)
and temperature values.
(8)
IN
value, based on design simulation and technology characteristics, not tested
(1)
(7)
(1)
(2)
IN
IN
maximum must be respected, otherwise refer to the I
> V
DD
while a negative injection is induced by V
V
V
V
Floating input mode
V
C
between 10% and 90%
DD
DD
SS
IN
L
= 50 pF
=
<
= 5 V
= 5 V
V
Conditions
V
SS,
IN
DD
<
V
, f
V
DD
OSC
DD
= 5 V
, and T
(5)(6)
PU
A
current characteristics described in
0.7xV
unless otherwise specified.
Min
50
0
1
DD
DD
or V
IN
Typ
200
120
0.7
< V
25
25
5
SS
INJ(PIN)
SS
.
. Refer to
0.3xV
ST72324Bxx
Max
±25
250
±4
+4
±1
DD
t
Unit
mA
mA
CPU
µA
pF
ns
V

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