ST72324BJ6 STMicroelectronics, ST72324BJ6 Datasheet - Page 67

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ST72324BJ6

Manufacturer Part Number
ST72324BJ6
Description
5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72324BJ6

Hdflash Endurance
1 kcycle at 55 °C, data retention 40 years at 85 °C
Clock Sources
crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
4 Power Saving Modes
Slow, Wait, Active-halt, and Halt
ST72324Bxx
Figure 34. Exact timeout duration (t
WHERE
t
t
t
CNT = value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits in the MCCSR
register
To calculate the minimum Watchdog timeout (t
IF
ELSE
To calculate the maximum Watchdog timeout (t
IF
ELSE
NOTE: In the above formulae, division results must be rounded down to the next integer value.
EXAMPLE: With 2ms timeout selected in MCCSR register
min0
OSC2
max0
CNT
Value of T[5:0] bits in WDGCR register
CNT
= (LSB + 128) x 64 x t
= 16384 x t
= 125 ns if f
(MCCSR reg.)
t
t
max
min
:
<
TB1 bit
MSB
-------------
MSB
-------------
4
0
0
1
1
=
=
4
t
t
min0
max0
OSC2
OSC2
THEN
THEN
(Hex.)
3F
00
+
+
= 8 MHz
16384
16384
OSC2
t
t
max
min
×
×
(MCCSR reg.)
=
=
CNT
CNT
t
t
TB0 bit
min0
max0
0
1
0
1
+
4CNT
---------------- -
+
MSB
4CNT
---------------- -
MSB
16384
16384
min
max
):
Min. Watchdog timeout (ms)
min
):
×
+
×
+
CNT
(
CNT
and t
(
192
192
Selected MCCSR timebase
×
+
+
×
1.496
LSB
t
LSB
t
128
t
osc2
max
min
osc2
)
)
×
)
×
10 ms
25 ms
2 ms
4 ms
64
64
×
×
4CNT
---------------- -
MSB
4CNT
---------------- -
MSB
Max. Watchdog timeout (ms)
×
×
t
osc2
t
osc2
On-chip peripherals
MSB
128.552
20
49
4
8
2.048
t
max
LSB
59
53
35
54
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