ST72324BK2 STMicroelectronics, ST72324BK2 Datasheet - Page 115

• Manufacturer Part Number: ST72324BK2
• Description: 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324BK2

• Hdflash Endurance: 1 kcycle at 55 °C, data retention 40 years at 85 °C
• Clock Sources: crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
• 4 Power Saving Modes: Slow, Wait, Active-halt, and Halt

ST72324Bxx
Figure 59. SCI baud rate and extended prescaler block diagram
Framing error
A framing error is detected when:
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When the framing error is detected:
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The FE bit is reset by a SCISR register read operation followed by a SCIDR register read
operation.
f
CPU
The stop bit is not recognized on reception at the expected time, following either a de-
synchronization or excessive noise.
A break is received.
the FE bit is set by hardware
Data is transferred from the Shift register to the SCIDR register.
No interrupt is generated. However this bit rises at the same time as the RDRF bit
which itself generates an interrupt.
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/PR
Extended transmitter prescaler register
Extended receiver prescaler register
Extended prescaler transmitter rate control
SCP1
Extended prescaler receiver rate control
Conventional baud rate generator
SCP0 SCT2 SCT1 SCT0 SCR2 SCR1SCR0
Transmitter rate
Extended prescaler
control
Receiver rate
control
SCIETPR
SCIERPR
SCIBRR
On-chip peripherals
Transmitter
clock
Receiver
clock
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