ST72324BK2 STMicroelectronics, ST72324BK2 Datasheet - Page 167

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ST72324BK2

Manufacturer Part Number
ST72324BK2
Description
5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72324BK2

Hdflash Endurance
1 kcycle at 55 °C, data retention 40 years at 85 °C
Clock Sources
crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
4 Power Saving Modes
Slow, Wait, Active-halt, and Halt
ST72324Bxx
Figure 81. SPI slave timing diagram with CPHA = 0
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Figure 82. SPI slave timing diagram with CPHA = 1
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
MISO
MOSI
SS
MISO
MOSI
INPUT
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
CPHA=0
CPOL=1
CPHA=0
CPOL=0
OUTPUT
INPUT
OUTPUT
INPUT
INPUT
t
a(SO)
see
note 2
See note 2
t
t
su(SS)
t
a(SO)
su(SS)
t
HZ
su(SI)
t
t
w(SCKH)
w(SCKL)
t
su(SI)
t
t
w(SCKH)
w(SCKL)
MSB OUT
MSB IN
MSB IN
t
MSB OUT
c(SCK)
t
h(SI)
t
h(SI)
t
v(SO)
t
c(SCK)
t
v(SO)
Bit 6 OUT
DD
DD
Bit 6 OUT
and 0.7xV
and 0.7xV
Bit 1 IN
t
h(SO)
(1)
(1)
Bit 1 IN
DD
DD
t
h(SO)
.
.
t
t
f(SCK)
r(SCK)
Electrical characteristics
t
t
f(SCK)
r(SCK)
LSB IN
LSB OUT
LSB IN
LSB OUT
t
h(SS)
t
h(SS)
t
dis(SO)
t
dis(SO)
note 2
See
see
note 2
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