71M6533 Maxim, 71M6533 Datasheet - Page 12

• Manufacturer Part Number: 71M6533
• Description: The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
• Manufacturer: Maxim

1.2.5 Voltage References
The device includes an on-chip precision bandgap voltage reference that incorporates auto-zero techniques.
The reference is trimmed in production to minimize errors caused by component mismatch and drift. The
result is a voltage output with a predictable temperature coefficient.
The amplifier within the reference is chopper stabilized, i.e. the polarity can be switched by the MPU using
CHOP_E[1:0] (I/O RAM 0x2002[5:4]). The CHOP_E[1:0] field enables the MPU to operate the chopper
circuit in regular or inverted operation, or in toggling mode. When the chopper circuit is toggled in between
multiplexer cycles, DC offsets on the measured signals will automatically be averaged out.
The general topology of a chopped amplifier is shown in
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as
controlled by CROSS, in the A position, the output voltage is:
With all switches set to the B position by applying the inverted CROSS signal, the output voltage is:
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the
output as positive and negative, which results in the offset effectively being eliminated, regardless of its
polarity or magnitude.
When CROSS is high, the connection of the amplifier input devices is reversed. This preserves the overall
polarity of that amplifier gain; it inverts its input offset. By alternately reversing the connection, the
amplifier’s offset is averaged to zero. This removes the most significant long-term drift mechanism in the
voltage reference. The CHOP_E[1:0] field controls the behavior of CROSS. The CROSS signal will reverse
the amplifier connection in the voltage reference in order to negate the effects of its offset. On the first
CK32 rising edge after the last multiplexer state of its sequence, the multiplexer will wait one additional
CK32 cycle before beginning a new frame. At the beginning of this cycle, the value of CROSS will be
updated according to the CHOP_E[1:0] field. The extra CK32 cycle allows time for the chopped VREF to
settle. During this cycle, MUXSYNC is held high. The leading edge of MUXSYNC initiates a pass through
the CE program sequence. The beginning of the sequence is the serial readout of the four RTM words.
12
Signal Number
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
0
1
2
3
4
V
V
inp
inn
Address
Figure 2: General Topology of a Chopped Amplifier
CROSS
(HEX)
0x00
0x01
0x02
0x03
0x04
A
B
A
B
Table 3: ADC RAM Locations
Name
VA
VB
IC
IA
IB
+
-
G
Figure
Signal Number
0x0A
0x0B
2.
A
B
B
A
5
6
Address
(HEX)
V
V
0x0A
0x0B
0x05
0x06
outp
outn
TEMP
Name
VBAT
VC
ID
Rev 2