71M6533 Maxim, 71M6533 Datasheet - Page 88

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71M6533

Manufacturer Part Number
71M6533
Description
The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet

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71M6533/G/H and 71M6534/H Data Sheet
88
LCD_BITMAP
[63:61],
[59:56]
LCD_BITMAP
[71:64]
LCD_BLKMAP18
[3:0]
LCD_CLK[1:0]
LCD_DAC[2:0]
LCD_E
LCD_MODE[2:0] 2021[4:2]
2027[7:5,3:0]
2028[7:0]
205A[3:0]
2021[1:0]
20AB[3:1]
2021[5]
0
0
0
0
0
0
0
L
L
L
L
L
L
L
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Configuration for DIO43/SEG63 through DIO41/SEG61 and DIO39/SEG59 through
DIO36/SEG56. LCD_BITMAP[62], corresponding to DIO42/SEG62, and
LCD_BITMAP[59:56] ,corresponding to DIO39/SEG59 through DIO36/SEG56, are only
applicable to the 71M6534. Unused bits should be set to zero.
Configuration for DIO51/SEG71 through DIO44/SEG64. LCD_BITMAP[66],
corresponding to DIO46/SEG66, is only applicable to the 71M6534. Unused bits should
be set to zero.
Identifies which segments connected to SEG18 should blink. 1 means blink. The
most significant bit corresponds to COM3, the least significant bit to COM0.
Sets the LCD clock frequency for the COM/SEG pins (not the frame rate) according to
the following (f
LCD contrast control DAC. Adjusts the LCD voltage in steps of 0.2 V from V3P3SYS
(mission mode) or VBAT (BROWNOUT/LCD modes).
Enables the LCD display. When disabled, VLC2, VLC1 and VLC0 are ground as are
the COM and SEG outputs.
The LCD bias mode. Use the LCD DAC to reduce saturation. The number of states is
the number of commons which are driven to multiplex the LCD.
LCD_DAC[2:0]
LCD_MODE[2:0]
1 = LCD pin, 0 = DIO pin.
1 = LCD pin, 0 = DIO pin.
00 = f
000
001
010
011
100
101
110
111
w
000
001
010
011
100
/512, 01 = f
w
= 32768 Hz):
Resulting LCD Voltage
V3P3 or VBAT
V3P3 or VBAT – 0.2 V
V3P3 or VBAT – 0.4 V
V3P3 or VBAT – 0.6 V
V3P3 or VBAT – 0.8 V
V3P3 or VBAT – 1.0 V
V3P3 or VBAT – 1.2 V
V3P3 or VBAT – 1.4 V
w
/256, 10 = f
Function
4 states, ⅓ bias
3 states, ⅓ bias
2 states, ½ bias
3 states, ½ bias
static display
w
/128, 11 = f
Notes
⅓ bias modes can drive 3.3 V LCDs.
½ bias and static modes can drive
both 3.3 V and 5 V LCDs.
w
/64
FDS_6533_6534_004
Rev 2

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