71M6533 Maxim, 71M6533 Datasheet - Page 93

• Manufacturer Part Number: 71M6533
• Description: The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
• Manufacturer: Maxim

FDS_6533_6534_004
Rev 2
SLOT0_ALTSEL
[3:0]
SLOT1_ALTSEL
[3:0]
SLOT2_ALTSEL
[3:0]
…
SLOT8_ALTSEL
[3:0]
SLOT9_ALTSEL
[3:0]
SP_ADDR[15:8]
SP_ADDR[7:0]
SP_CMD
SPE
SPI_FLAG
SUBSEC[7:0]
SUM_CYCLES[5:0] 2001[5:0]
TMUX[4:0]
TRIM[7:0]
TRIMSEL[3:0]
UMUX_E
UMUX_SEL
†
†
2096[3:0]
2096[7:4]
2097[3:0]
…
209A[3:0]
209A[7:4]
2072[7:0]
2073[7:0]
2071
2070[7]
20B1[4]
2014[7:0]
20AA[4:0]
20FF
20FD[3:0]
200F[7]
S00F[6]
10
11
…
1
8
9
–
–
0
–
0
2
0
0
0
0
10
11
…
1
8
9
–
–
0
–
0
–
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
Alternate multiplexer frame analog input selection. Maps the selected input, 0-11, to
the multiplexer state.
The additional inputs, 10 and 11 in the alternate frame are:
SPI Address. 16-bit address from the bus master.
SPI command. 8-bit command from the bus master.
SPI port enable. Enables the SPI interface on pins SEG3 through SEG6.
SPI interrupt flag. The flag is set by the hardware and is cleared by the firmware
writing a 0. Firmware using this interrupt should clear the spurious interrupt indication
during initialization.
The remaining count, in terms of 1/256 RTC cycles, to the next one second boundary.
SUBSEC may be read by the MPU after the one second interrupt and before reaching
the next one second boundary. Setting RST_SUBSEC will clear SUBSEC.
The number of pre-summer outputs summed in the final summer.
Selects one of 32 signals for TMUXOUT. For details, see Section
(TMUXOUT
Contains TRIMT[7:0], TRIMBGA,TRIMBGB or TRIMM[2:0] depending on the value
written to TRIMSEL[3:0]. If TRIMBGB = 0, the device is a 71M6533/71M6534, else it is
a 71M6533H/71M6534H.
Selects the temperature trim fuse to be read with the TRIM register:
Enables the optical UART multiplexer, selects the alternate function (MTX, MRX) for
DIO18, DIO22.
When UMUX_E = 1, selects between OPT_TX, OPT_RX and MTX, MRX as the optical
UART I/O pins. 0 = OPT_TX, OPT_RX, 1 = MTX, MRX
TRIMSEL[3:0]
10 = TEMP
11 = VBAT
1
4
5
6
Pin).
TRIMT[7:0]
TRIMM[2:0]
TRIMBGA
TRIMBGB
Trim Fuse
Purpose
Trim for the magnitude of VREF
Trim values related to temperature
compensation
71M6533/G/H and 71M6534/H Data Sheet
1.5.13 Test Ports
93