71M6533 Maxim, 71M6533 Datasheet - Page 73

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71M6533

Manufacturer Part Number
71M6533
Description
The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet

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shown in
Pull-up resistors of roughly 10 kΩ to V3P3D (to ensure operation in BROWNOUT mode) should be used
for both SCL and SDA signals. The DIO_EEX[1:0] register in I/O RAM must be set to 1 in order to convert
4.3 Connecting I
I
the DIO pins DIO4 and DIO5 to I
4.4 Connecting Three-Wire EEPROMs
µWire EEPROMs and other compatible devices should be connected to the DIO pins DIO4 and DIO5, as
shown in
Rev 2
2
C EEPROMs or other I
DIO5 connects to both the DI and DO pins of the three-wire device.
The CS pin must be connected to a vacant DIO pin of the 71M6533/71M6534.
In order to prevent bus contention, a 10 kΩ to resistor is used to separate the DI and DO signals.
The CS and CLK pins should be pulled down with a resistor to prevent operation of the three-wire
device on power-up, before the 71M6533/71M6534 can establish a stable signal for CS and CLK.
The DIO_EEX[1:0] field in I/O RAM must be set to 2 in order to convert the DIO pins DIO4 and DIO5
to µWire pins.
Figure
Figure 38
The µ-Wire EEPROM interface is only functional when MPU_DIV[2:0] = 000.
37.
and described below:
2
C EEPROMs
2
C compatible devices should be connected to the DIO pins DIO4 and DIO5, as
71M6533/71M6534
71M6533/71M6534
2
C pins SCL and SDA.
Figure 37: I
Figure 36: Connecting LCDs
DIO4
DIO5
2
10 k Ω
C EEPROM Connection
10 k Ω
LCD
EEPROM
SCL
SDA
segments
commons
V3P3D
73

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