TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 207

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

3.12.2
Control Registers
(1) Watchdog timer mode register (WDMOD)
(2) Watchdog timer control register (WDCR)
The watchdog timer WDT is controlled by two control registers WDMOD and WDCR.
function.
•
•
•
a.
b.
c.
This register is used to disable and clear of binary counter the watchdog timer
WDCR register after clearing WDMOD<WDTE> to 0.
clear code (4EH) into the WDCR register.
Disable control
Enable control
Watchdog timer clear control
Setting the detection time for the watchdog timer <WDTP>
runaway. This register is initialized to WDMOD<WDTP1:0> = 00 when reset.
Watchdog timer enable/disable control <WDTE>
code (B1H) into the watchdog timer control register WDCR. This makes it difficult
for the watchdog timer to be disabled by runaway.
simply by setting <WDTE> to 1.
Watchdog timer out reset connection<RESCR>
internally. Since WDMOD<RESCR> is initialized to 0 at reset, a watchdog timer
reset is not performed.
WDMOD
WDCR
WDCR
The watchdog timer can be disabled by writing the disable code (B1H) to the
This sets WDMOD<WDTE> to 1.
The binary counter can be cleared and made to resume counting by writing the
This 2-bit register is used to set the watchdog timer interrupt time for detecting
The detection time for WDT is shown in Table 3.12.1.
When reset, WDMOD<WDTE> is initialized to 1 to enable the watchdog timer.
To disable the timer, it is necessary to clear this bit to 0 and write the disable
However, it is possible to return from the disabled state to the enabled state
This bit is used to connect the output of the watchdog timer with
← 0 − − − − − X X
← 1 0 1 1 0 0 0 1
← 0 1 0 0 1 1 1 0
X: Don’t care, −: No change
93CS20-205
Clear WDMOD<WDTE> to 0.
Write the disable code (B1H).
Write the clear code (4EH).
TMP93CS20
2004-02-10
RESET