TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 244

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

Symbol
TREG4L
TREG4H
TREG5L
TREG5H
CAP4L
CAP4H
T4MOD
T4FFCR
16-bit
timer
register 4
low
16-bit
timer
register 4
high
16-bit
timer
register 5
low
16-bit
timer
register 5
high
Capture
register 4
low
Capture
register 4
high
16-bit
timer 4
source
CLK and
mode
16-bit
timer 4
flip-flop
control
Timer control (2/5)
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
RMW)
RMW)
RMW)
RMW)
2AH
2BH
2CH
2DH
2AH
2BH
2EH
2FH
7
6
93CS20-242
0: Soft-
1: Don't
CAP4IN
capture
care
R/W
W
5
1
−
0
Write “0”.
R/W
4
−
0
−
0
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Write “0”.
W
W
W
W
R
R
−
−
−
−
−
−
1: Trigger enable
TFF4 invert trigger
0: Trigger disable
Inverted
when the
UC value
matches
TREG5
EQ5T4
3
−
0
0
R/W
1:
Inverted
when the
UC value
matches
TREG4
EQ4T4
UC4
clear
enable
CLE
R/W
2
0
0
T4CLK1
Source clock
00: TI4 input
01: φT1
10: φT4
11: φT16
TFF4C1
TFF4 control
00: Invert TFF4
01: Set TFF4
10: Clear TFF4
11: Don’t care
* Always read as 11.
1
TMP93CS20
0
1
2004-02-10
W
T4CLK0
TFF4C0
0
0
1