TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 58

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
3.5.3
Port 2 (P20 to P27)
register P2CR and function register P2FC. Resetting resets all bits of output latch P2 to P1,
control register P2CR and function register P2FC to 0. It also sets port 2 to input mode and
connects a pull-up resistor.
address bus (A0 to A7) or (A16 to A23). To use port 2 as an address bus, write 0 to the
output latches to turn off the programmable pull-up resistors.
Port 2 is an 8-bit general-purpose I/O port. I/O can be set on a bit basis using the control
In addition to functioning as a general-purpose I/O port, port 2 also functions as an
Direction control
Function control
P2 read
(on bit basis)
(on bit basis)
Output latch
P2CR write
P2FC write
P2 write
Reset
A16 to A23
A0 to A7
Figure 3.5.4 Port 2
B
A
Selector
93CS20-56
S
S
B
A
Y
B
A
S
Y
Output buffter
P-ch
Port 2
P20 to P27
(A0 to A7/
A16 to A23)
Programmable
TMP93CS20
2004-02-10
pull up

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