PM5366-PI PMC-Sierra, Inc., PM5366-PI Datasheet - Page 152

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PM5366-PI

Manufacturer Part Number
PM5366-PI
Description
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
Manufacturer
PMC-Sierra, Inc.
Datasheet

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PROPRIETARY AND CONFIDENTIAL
Register 0x1000: Master Test Register
PMCTST:
DBCTRL:
Reserved:
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register is used to select TEMAP-84 test features. All bits, except for
PMCTST, are reset to zero by a hardware reset of the TEMAP-84; a software
reset of the TEMAP-84 does not affect the state of the bits in this register.
The PMCTST bit is used to configure the TEMAP-84 for PMC's
manufacturing tests. When PMCTST is set to logic 1, the TEMAP-84
microprocessor port becomes the test access port used to run the PMC
"canned" manufacturing test vectors. The PMCTST bit can only be cleared
by setting CSB to logic 1.
The DBCTRL bit is used to pass control of the data bus drivers to the CSB
pin while PMCTST is a logic 1. When the DBCTRL bit is set to logic 1, the
CSB pin controls the output enable for the data bus. While the DBCTRL bit is
set, holding the CSB pin high causes the TEMAP-84 to drive the data bus
and holding the CSB pin low tri-states the data bus. The DBCTRL bit
overrides the HIZDATA bit. The DBCTRL bit is used to measure the drive
capability of the data bus driver pads. When PMCTST is logic 0, the DBCTRL
bit is ignored.
These bits must be logic 0 for correct operation.
Type
R/W
R/W
R/W
R/W
W
W
ISSUE 1
Function
Reserved
Reserved
HIZDATA
PMCTST
DBCTRL
Unused
Unused
HIZIO
140
Default
X
X
X
X
0
0
0
0
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PM5366 TEMAP-84

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