PM5366-PI PMC-Sierra, Inc., PM5366-PI Datasheet - Page 166

• Manufacturer Part Number: PM5366-PI
• Description: HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
• Manufacturer: PMC-Sierra, Inc.

PRELIMINARY
DATASHEET
PMC-2010672
12.3 DS3 Frame Format
PROPRIETARY AND CONFIDENTIAL
M-subframe 1
M-subframe 2
M-subframe 3
M-subframe 4
M-subframe 5
M-subframe 6
M-subframe 7
As alternate formulation, if SSTM[1:0] was converted to its decimal equivalent,
one would have to satisfy the constraint:
The TEMAP-84 provides support for both the C-bit parity and M23 DS3 framing
formats. The DS3 frame format is shown in Figure 13.
Figure 12
X x : X-Bit Channel
P x : P-Bit Channel
• Transmit: The TEMAP-84 inserts the FERF signal on the X-bits. FERF
• Receive: The TEMAP-84 monitors the state and detects changes in the
• Transmit: The TEMAP-84 calculates the parity for the payload data over
• Receive: The TEMAP-84 calculates the parity for the received payload.
(SSTM + 1) mod 4 = Clock Cycles SDC1FP leads LREFCLK
generation is controlled by either the FERF bit of the DS3 TRAN
Configuration register or by detection of OOF, RED, LOS and AIS, as
configured by the TEMAP-84 Master DS3 Alarm Enable register.
state of the FERF signal on the X-bits.
the previous M-frame and inserts it into the P1 and P2 bit positions.
Errors are accumulated in the DS3 PMON Parity Error Event Count
registers.
X 1
X 2
P 1
P 2
M 1
M 2
M 3
01
10
11
84 bits
- DS3 Frame Structure
F 1
F 1
F 1
F 1
F 1
F 1
F 1
84 bits
ISSUE 1
C 1
C 1
C 1
C 1
C 1
C 1
C 1
84 bits
2
3
0
F 2
F 2
F 2
F 2
F 2
F 2
F 2
84 bits
154
C 2
C 2
C 2
C 2
C 2
C 2
C 2
84 bits
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
F 3
F 3
F 3
F 3
F 3
F 3
F 3
84 bits
C 3
C 3
C 3
C 3
C 3
C 3
C 3
84 bits
AND M13 MULTIPLEXER
PM5366 TEMAP-84
F 4
F 4
F 4
F 4
F 4
F 4
F 4
84 bits