ATA6613 ATMEL Corporation, ATA6613 Datasheet - Page 236

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ATA6613

Manufacturer Part Number
ATA6613
Description
Ata6613
Manufacturer
ATMEL Corporation
Datasheet

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6.19.5
6.19.5.1
236
ATA6612/ATA6613
Overview of the TWI Module
SCL and SDA Pins
The TWI module is comprised of several submodules, as shown in
drawn in a thick line are accessible through the AVR data bus.
Figure 6-85. Overview of the TWI Module
These pins interface the AVR TWI with the rest of the MCU system. The output drivers contain a
slew-rate limiter in order to conform to the TWI specification. The input stages contain a spike
suppression unit removing spikes shorter than 50 ns. Note that the internal pull-ups in the AVR
pads can be enabled by setting the PORT bits corresponding to the SCL and SDA pins, as
explained in the I/O Port section. The internal pull-ups can in some systems eliminate the need
for external ones.
Slew-rate
Address Match Unit
Arbitration detection
Control
START / STOP
Address Comparator
Address Register
Control
SCL
(TWAR)
Spike
Filter
Bus Interface Unit
Spike Suppression
Address/Data Shift
Register (TWDR)
Slew-rate
Control
SDA
Status Register
Ack
Spike
Filter
(TWSR)
State Machine and
Control Unit
Status control
Bit Rate Generator
Control Register
Bit Rate Register
Prescaler
(TWCR)
(TWBR)
Figure
6-85. All registers
9111C–AUTO–02/08

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