ATA6613 ATMEL Corporation, ATA6613 Datasheet - Page 326

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ATA6613

Manufacturer Part Number
ATA6613
Description
Ata6613
Manufacturer
ATMEL Corporation
Datasheet

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Figure 7-1.
7.1
Table 7-2.
326
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
SPI Timing Characteristics
ATA6612/ATA6613
SCL
SDA
2-wire Serial Bus Timing
SPI Timing Parameters
SS high to tri-state
SCK to out high
SCK to SS high
SCK high/low
SS low to SCK
t
SU;STA
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
Description
SCK period
SCK period
Out to SCK
SCK to out
SCK to out
Setup
Setup
Hold
Hold
See
Note:
(1)
Figure 7-2 on page 327
1. In SPI Programming mode the minimum SCK high/low period is:
t
HD;STA
- 2 t
- 3 t
t
t
of
LOW
CLCL
CLCL
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
for f
for f
CK
CK
t
HIGH
< 12 MHz
> 12 MHz
t
HD;DAT
and
4 • t
2 • t
Min
Figure 7-3 on page 327
10
t
20
20
ck
t
ck
ck
LOW
t
SU;DAT
See
Table 6-69 on page 190
50% duty cycle
0.5 • t
1600
Typ
for details.
3.6
10
10
10
10
15
15
10
sck
t
SU;STO
t
r
Max
t
9111C–AUTO–02/08
BUF
ns

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