ATA6613 ATMEL Corporation, ATA6613 Datasheet - Page 278

• Manufacturer Part Number: ATA6613
• Description: Ata6613
• Manufacturer: ATMEL Corporation

6.21.6.2
278
ATA6612/ATA6613
ADC Control and Status Register A – ADCSRA
Table 6-99.
MUX3..0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
• Bit 7 – ADEN: ADC Enable
• Bit 6 – ADSC: ADC Start Conversion
• Bit 5 – ADATE: ADC Auto Trigger Enable
Initial Value
Read/Write
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning
the ADC off while a conversion is in progress, will terminate this conversion.
In Single Conversion mode, write this bit to one to start each conversion. In Free Running
mode, write this bit to one to start the first conversion. The first conversion after ADSC has
been written after the ADC has been enabled, or if ADSC is written at the same time as the
ADC is enabled, will take 25 ADC clock cycles instead of the normal 13. This first conversion
performs initialization of the ADC.
ADSC will read as one as long as a conversion is in progress. When the conversion is com-
plete, it returns to zero. Writing zero to this bit has no effect.
When this bit is written to one, Auto Triggering of the ADC is enabled. The ADC will start a
conversion on a positive edge of the selected trigger signal. The trigger source is selected
by setting the ADC Trigger Select bits, ADTS in ADCSRB.
Bit
Input Channel Selections
ADEN
R/W
7
0
ADSC
R/W
6
0
Single Ended Input
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
1.1V (V
0V (GND)
ADATE
R/W
5
0
BG
)
ADIF
R/W
4
0
ADIE
R/W
3
0
ADPS2
R/W
2
0
ADPS1
R/W
1
0
ADPS0
R/W
0
0
9111C–AUTO–02/08
ADCSRA