KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 27

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KSZ8841-16

Manufacturer Part Number
KSZ8841-16
Description
Single-port Ethernet Mac Controller With Non-pci Interface
Manufacturer
Micrel Semiconductor
Datasheet

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0
Flow Control
The KSZ8841M supports standard 802.3x flow control frames on both transmit and receive sides.
On the receive side, if the KSZ8841M receives a pause control fr
frame until the timer, specified in the pause control frame, expires. If another pause frame is received before the current
timer expires, the timer will be updated with the new value in the second pause frame. During this period (while it is flow
controlled), only flow control packets from the KSZ8841M are transmitted.
On the transmit side, the KSZ8841M
control is based on availability of the system resources.
The KSZ8841M issues a flow control frame (Xoff, or transmitter off), containing the maximum pause time defined in IEEE
standard
transmitter on) with zero pause time to turn off the flow control (turn on transmission to the port). A hysteresis feature is
provided to prevent the flow control mechanism from being constantly activated and deactivated.
Half-Du
A half-duplex backpressure option (non-IEEE 802.3 standards) is also provided. The activation and deactivation
conditions are the same as in full-duplex mode. If backpressure is required, the KSZ8841M sends preambles to defer the
other stations' transmission (carrier sense deference).
To avoid jabber and excessive deference (as defined in the 802.3 standard), after a certain time, the KSZ8841M
discontinues the carrier sense and then raises it again quickly. This short silent time (no carrier sense) prevents other
stations from sending out packets thus keeping other stations in a carrier sens
send during a
transmitted instead. If there are no additional packets to send, carrier sense type backpressure is reactivated again until
chip resources free up. If a collision occurs, the binary exponential back-off algorithm is skipped and carrier sense is
generated imme
reception.
Clock Generator
The X1 and X2 pins are connected to a 25MHz crystal. X1 ca
(as described in the pin description).
The bus interface unit (BIU) uses BCLK (Bus Clock) for synchronous accesses. The maximum frequency is 50MHz for
VLBus-like and EISA-like slave direct memory access (DMA).
Bus Interface Unit (BIU)
The BIU host interface is a generic bus interface, designed to communicate with e
logic may be required when it talks to various standard buses and processors.
Supported Transfers
In terms of transfer type, the BIU can support two transfers: asynchronous transfer and synchronous transfer. To support
these transfers (async
Since both synchronous and asynchronous signals ar
asynchronous transfer can be mixed or interleaved but cannot be overlapped (due to the sharing of common signals).
November 2005
Micrel Confidential
1. Synchronous
2. Asynchronous
3. Common signals are used for both synchronous and asynchronous transfers.
plex Backpressure
802.3x. Once the resource is freed up, the KSZ8841M sends out the another flow control frame (Xon, or
backpressure situation, the car
diately, thus reducing the chan
signals
hronous and synchronous), the BIU provides three groups of signals:
signals
has intelligent and efficient ways to determine when to invoke flow control. The flow
ce of further collision and carrier sense is maintained to prevent packet
rier sense type backpressure is interrupted and those packets are
27
e independent of each other, synchronous transfer and
n also serve as the connector to a 3.3V, 25MHz oscillator
ame, the KSZ8841M will not transmit the next normal
e deferred state. If the port has packets to
mbedded processors. The use of glue
KSZ8841-16/32 MQL/MVL
Rev 1.3

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