KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 46

• Manufacturer Part Number: KSZ8841-16
• Description: Single-port Ethernet Mac Controller With Non-pci Interface
• Manufacturer: Micrel Semiconductor

Register Map: MAC and PHY
Do not write to bit va
unpredictable and often fatal results. If the user wants to writ
reserved bits (RO or RW) first, then “OR” with the read value of the reserved bits and write back to these reserved bits.
Bit Type
RO = Read only.
RW = Read/Write.
W1C = Write 1 to Clear (writing a one to this bit clears it).
Bank 0-63 Bank Select Register (0x0E): BSR (same location in all Banks)
The bank select register is used to select or to switch between different sets of register banks for I/O access.
There are a total of 64 banks available to select, including the built-in switch engine registers.
Bank 0 Base Address Register (0x00): BAR
Th
upon a power-on reset if the EEPROM Enable (EEEN) pin is tied to High. Its value can also be modified after reset.
Writing to this register does not store the value into the EEPROM. When the EEEN pin is tied to Low, the default base
address is 0x300.
November 2005
Micrel Confidential
Bit
15-6
5-0
Bit
15-8
7-5
4-0
is register
Defin
Default Value
0x000
0x00
Defau
0x03 if EEEN
is Low or, the
value fr
EEP
EEE
0x00 if EEEN
is Low or, the
value from
EEPRO
EEE
0x00
holds
ition
ROM f
N is igh
N is High
lt Valu
om
M if
th
H
i
e base address for decoding a device access. Its value is loaded from the external EEPROM (0x0H)
e
lues or to registers defined as Reserved. Manipulating reserved bits or registers causes
R/W
RO
R/W
R/W
RW
RW
RO
Description
Reserved
BSA Bank Select Address Bits
BSA bits select the I/O register bank in use.
This register is always accessible regardless of the register bank currently selected.
Notes:
The bank select register can be accessed as a doubleword (32-bit) at offset 0xC, as
a word (16-bit) at offset 0xE, or as a byte (8-bit) at offset 0xE.
A doubleword write to offset 0xC writes to the BANK Select Register but does not
write to registers 0xC and 0xD; it only writes to register 0xE.
Description
BARH Base Address High
These bits are compared against the address on the bus ADDR[15:8] to determine the
BASE for the KSZ8841M registers.
BARL Base Address Low
These bits are compared against the address on the bus ADDR[7:5] to determine the
BASE for the KSZ8841M register
Reserved.
46
e to thes reserved
s.
e
bits
, the use
KSZ8841-16/32 MQL/MVL
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as to rea
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ack thes
Rev 1.3
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