MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 126

• Manufacturer Part Number: MC56F836
• Description: 56f8300 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

6.5.9.15
Each bit controls clocks to the indicated peripheral.
6.5.9.16
Each bit controls clocks to the indicated peripheral.
6.5.10
The I/O Short Address Location registers are used to specify the memory referenced via the I/O short
address mode. The I/O short address mode allows the instruction to specify the lower six bits of address;
the upper address bits are not directly controllable. This register set allows limited control of the full
address, as shown in
Note:
With this register set, an interrupt driver can set the SIM_ISALL register pair to point to its peripheral
registers and then use the I/O Short addressing mode to reference them. The ISR should restore this register
to its previous contents prior to returning from interrupt.
Note:
Note:
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0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
I/O Short Address Location Register (SIM_ISALH and SIM_ISALL)
If this register is set to something other than the top of memory (EOnCE register space) and the EX bit
in the OMR is set to 1, the JTAG port cannot access the on-chip EOnCE registers, and debug functions
will be affected.
The default value of this register set points to the EOnCE registers.
The pipeline delay between setting this register set and using short I/O addressing with the new value
is three cycles.
Pulse Width Modulator B Enable (PWMB)—Bit 1
Pulse Width Modulator A Enable (PWMA)—Bit 0
2 Bits from SIM_ISALH Register
Full 24-Bit for Short I/O Address
Figure
16 Bits from SIM_ISALL Register
Figure 6-14 I/O Short Address Determination
6-14.
6 Bits from I/O Short Address Mode Instruction
56F8365 Technical Data, Rev. 7
“
Hard Coded” Address Portion
Instruction Portion
Freescale Semiconductor
Preliminary