MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 35

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MC56F836

Manufacturer Part Number
MC56F836
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Part 3 On-Chip Clock Synthesis (OCCS)
3.1 Introduction
Refer to the OCCS chapter of the 56F8300 Peripheral User Manual for a full description of the OCCS.
The material contained here identifies the specific features of the OCCS design.
specific OCCS block diagram to reference in the OCCS chapter of the 56F8300 Peripheral User Manual.
3.2 External Clock Operation
The system clock can be derived from an external crystal, ceramic resonator, or an external system clock
signal. To generate a reference frequency using the internal oscillator, a reference crystal or ceramic
resonator must be connected between the EXTAL and XTAL pins.
3.2.1
The internal oscillator is designed to interface with a parallel-resonant crystal resonator in the frequency
range specified for the external crystal in
in
parameters determine the component values required to provide maximum stability and reliable start-up.
Freescale Semiconductor
Preliminary
Figure
CLKMODE
3-2. Follow the crystal supplier’s recommendations when selecting a crystal, since crystal
Crystal Oscillator
EXTAL
XTAL
Crystal
OSC
÷ (
Prescaler
PLLCID
1,2,4,8
Figure 3-1 OCCS Block Diagram
)
56F8365 Technical Data, Rev. 7
Table
x (1 to 128)
Detector
PLLDB
Lock
PLL
10-15. A recommended crystal oscillator circuit is shown
Reference
Detector
Loss of
Clock
F
OUT
Prescaler CLK
Bus Interface & Control
÷
2
F
OUT/2
PLLCOD
Loss of Reference
÷ (
Postscaler
Clock Interrupt
1,2,4,8
)
LCK
Postscaler CLK
ZSRC
SYS_CLK2
Source to SIM
Figure 3-1
Interface
Bus
shows the
Introduction
35

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