ST92195C STMicroelectronics, ST92195C Datasheet - Page 115

• Manufacturer Part Number: ST92195C
• Description: 48-96 Kbyte Rom Hcmos Mcu With On-screen Display And Teletext Data Slicer
• Manufacturer: STMicroelectronics

ST92195C/D - ON SCREEN DISPLAY (OSD)
ON SCREEN DISPLAY (Cont’d)
7.4.6 Display Memory Mapping Examples
The display content is stored in TDSRAM, (2 to 8K
bytes starting at address 8000h). Use register
TDPR R252 (FCh) Page 32 to address the memo-
ry blocks containing the display data. Two 4-bit ad-
dress pointers (bits PG and HS) must be given that
point to separate blocks containing the display
page and the header/status rows.
Alternatively, the PG and HS pointers can be writ-
ten to the TDPPR R246 Page 33 and TDHSPR
R247 Page 33 registers.
Figure 69. Serial Mode (40 Characters) - Page Mapping
Figure 70. Serial Mode (40 Characters) - Header and Status Mapping
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Resolution 0.5K bytes
Resolution 1K bytes
Scrolling Buffer
0.5K TDSRAM
Status Row 0
Status Row 1
1K TDSRAM
Free Space
Free Space
Row 23
Header
Row 1
Block Number
Number(1K)
(0.5K)
Block
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
7.4.6.1 Building a Serial Mode Full Page 40-
Char Display
Page Location:
The 1 Kbyte block of page content is stored in the
TDSRAM location pointed to by the PG3..PG0
bits.
Header & Status Rows Location:
The 0.5 Kbyte block containing the Header, Status
Row 0 and Status Row 1 is pointed to by the
HS3..HS0 bits.
Row Scrolling Buffer Location:
The scrolling buffer corresponds to the 40 bytes
following the Row 23 when the scrolling feature is
used.
Address (hex.)
Address (hex)
TDSRAM
TDSRAM
8A00
8C00
8E00
9A00
9C00
9E00
8000
8200
8400
8600
8800
9000
9200
9400
9600
9800
8C00
9C00
8000
8400
8800
9000
9400
9800
(Hex.) HS3..HS0
TDPR Value
Value (hex)
PG3..PG0
TDPR
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
A
C
E
0
2
4
6
8
2K
2K
6K
6K
8K
8K