ST92195C STMicroelectronics, ST92195C Datasheet - Page 65

• Manufacturer Part Number: ST92195C
• Description: 48-96 Kbyte Rom Hcmos Mcu With On-screen Display And Teletext Data Slicer
• Manufacturer: STMicroelectronics

FREQUENCY MULTIPLIERS (Cont’d)
For the Off-chip filter components please refer to
the Required External Components figure provid-
ed in the first section of the data sheet.
The frequency multipliers are off during and upon
exiting from the reset phase. The user must pro-
gram the desired multiplying factor, start the multi-
plier and then wait for its stability (refer to the Elec-
trical Charateristics chapter for the specified de-
lay).
Once the Core/Peripherals multiplier is stabilized,
the Main Clock controller can be re-programmed
(through the FMSL bit, MCCR.6) to provide the fi-
nal frequency (INTCLK) to the CPU.
The
switched off when the µP enters in HALT mode
(the HALT mode forces the control register to its
reset status).
Table 12. Examples of CPU speed choice
Table 15. External PLL Filter Stabilisation time
Clock Pin Name
Frequency
Crystal
4 MHz
4 MHz
4 MHz
frequency
MCFM
PXFM
TXCF
multipliers
FML
(3:0)
4
5
6
Teletext PLL Clock Filter input Pin
Main Clock PLL Filter Input Pin
Pixel Clock PLL Filter Input Pin
Internal Frequency
are
Clock Name
10 MHz
12 MHz
14 MHz
(Fimf)
automatically
ST92195C/D - TIMING AND CLOCK CONTROLLER
Note: 24 MHz is the max. CPU authorized frequency.
Table 13. DOTCK/2 frequency choices
(*) Preferred values for 4/3.
(**) 16/9 screen formats.
Note: 18 MHz is the min. DOTCK/2 authorized frequency.
Table 14. Data Slicer over-sampling clock
Crystal
Frequ.
4 MHz
8 MHz
Control Register
4 MHz
4 MHz
4 MHz
(other values are not allowed)
SKW
(3:0)
PXCCR
SLCCR
10
11
MCCR
Prescale
8
9
factor
128
64
11
7
8
Multiply
factor
777
777
Stabilization Period
200 ms
24 MHz (**)
35 ms.
35 ms
20 MHz(*)
DOTCK/2
Frequency (Fslic)
18 MHz
22 MHz
48.5625 MHz
48.5625 MHz
16 MHz
18 MHz
24 MHz
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