ST92195C STMicroelectronics, ST92195C Datasheet - Page 189

• Manufacturer Part Number: ST92195C
• Description: 48-96 Kbyte Rom Hcmos Mcu With On-screen Display And Teletext Data Slicer
• Manufacturer: STMicroelectronics

ST92195C/D - TWO-CHANNEL I
I
7.10.6 Register Description
OWN ADDRESS REGISTER (I2COAR)
R240 - Read/Write
Register Page: 44
Reset Value: 0000 0000(00h)
Bit 7:1 = ADR[7:1] Interface Slave Address
These bits are the 7 most significant bits of the 8-
bit address assigned to interface when it works in
slave mode.
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ADR7 ADR6
2
C BUS INTERFACE (Cont’d)
7
ADR5
ADR4 ADR3
ADR2
2
C BUS INTERFACE (I2C)
ADR1 ADR0
0
Bit 0 = ADR0 Address match bit
This bit selects when the I
active if it works in slave mode, and if its slave ad-
dress is transmitted on the bus.
0: The interface becomes an active slave when the
1: The interface becomes an active slave when
7 most significant bits ADR[7:1] match the ad-
dress transmitted by a master.
only the 4 most significant bits ADR[7:4] match
the address transmitted by a master. This fea-
ture allows the master to send data simultane-
ously to up to 8 slaves with identical ADR(7:4).
2
C interface becomes