MBM29LV800TE Fujitsu Microelectronics, Inc., MBM29LV800TE Datasheet - Page 23

• Manufacturer Part Number: MBM29LV800TE
• Description: 8m 1m X 8/512 K X 16 Bit
• Manufacturer: Fujitsu Microelectronics, Inc.

22
MBM29LV800TE/BE
Write Operation Status
*1 : Performing successive read operations from any address will cause DQ
*2 : Reading the byte address being programmed while in the erase-suspend program mode will indicate logic “1”
Notes :
DQ
Data Polling
In Progress
Exceeded
Time Limits
The MBM29LV800TE/BE devices feature Data Polling as a method to indicate to the host that the Embedded
Algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read devices
will produce a complement of data last written to DQ
an attempt to read device will produce true data last written to DQ
attempt to read device will produce a “0” at the DQ
an attempt to read device will produce a “1” on DQ
Polling Algorithm” in “ FLOW CHART”.
For chip erase and sector erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six
write pulse sequence. Data Polling must be performed at sector address of sectors being erased, not protected
sectors. Otherwise, the status may be invalid. Once the Embedded Algorithm operation is close to completion,
MBM29LV800TE/BE data pins (DQ
This means that devices are driving status information on DQ
data at the next instant of time. Depending on when the system samples the DQ
or valid data. Even if device has completed the Embedded Algorithm operation and DQ
outputs on DQ
attempts.
The Data Polling feature is active only during the Embedded Programming Algorithm, Embedded Erase Algorithm
or sector erase time-out.
See “Data Polling during Embedded Algorithm Operation Timing Diagram” in “
Data Polling timing specifications and diagrams.
7
at the DQ
DQ
DQ
1
4
2
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
and DQ
is Fujitsu internal use only.
bit. However, successive reads from the erase-suspended sector will cause DQ
6
to DQ
0
are reserved pins for future use.
0
may be still invalid. The valid data on DQ
Erase Suspend Read
Erase Suspend Read
Erase Suspend Program
Erase Suspend Program
(Erase Suspended Sector)
(Non-Erase Suspended Sector)
(Non-Erase Suspended Sector)
(Non-Erase Suspended Sector)
Status
7
) may change asynchronously while the output enable (OE) is asserted low.
Hardware Sequence Flags
60/70/90
7
output. Upon completion of the Embedded Erase Algorithm
7
7
. The flowchart for Data Polling (DQ
. Upon completion of the Embedded Program Algorithm,
7
at one instant of time and then that byte’s valid
Data
DQ
DQ
DQ
DQ
DQ
0
1
0
7
7
. During the Embedded Erase Algorithm, an
to DQ
7
7
7
7
7
Toggle*
Toggle
Toggle
Toggle
Toggle
Toggle
6
0
Data
DQ
to toggle.
will be read on the successive read
1
6
1
7
output, it may read the status
TIMING DIAGRAM” for the
Data
DQ
0
0
0
0
1
1
1
7
5
has a valid data, data
7
) is shown in “Data
Data
2
DQ
to toggle.
0
1
0
0
0
1
0
3
Toggle
Toggle
Data
DQ
N/A
N/A
1*
1
1
2
2