CS2461 Amphion, CS2461 Datasheet - Page 2

• Manufacturer Part Number: CS2461
• Description: User-programmable Fft/ifft 64-point Block Based
• Manufacturer: Amphion

FFT (Fast Fourier Transform) and IFFT (Inverse Fast Fourier
Transform) are algorithms computing 2
Fourier transform and inverse discrete Fourier transform, as
defined below.
Where N=2
The
proportional to Nlog
FFT/IFFT is performed. The higher the radix, the less number
of multiplication is required, however the more simultaneous
multiple data access is required which causes the circuits to be
more complicated. The radix-4 algorithm offers a balance
between the computational and circuit complexity and is often
used in construction of higher radix FFT computation units
when designing high performance FFT/IFFT hardware.
2
CLK
NotRST
CLR
IFFT
SDC
XRe
XIm
XBS
YEnab
XBIP
Busy
IFFT:
FFT:
CS2461
Name
computational
Y k ( )
Y k ( )
FAST FOURIER TRANSFORM
P
and
I/O Width
=
=
1
1
1
1
1
1
1
1
1
0
0
N 1
n
--- -
N
1
∑
=
–
N 1
n
∑
0
W
=
–
X n ( )
0
12
12
X n ( )
N
R
1
1
1
1
3
1
1
1
1
N, where R is the radix base on which
complexity
W
=
64-Point Block Based FFT/IFFT
N
–
W
N
nk
e
Clock signal, rising edge active
Asynchronous global reset signal, active LOW
Clear (synchronous reset) and programming signal, active HIGH
Programming signal specifying the transform type, loaded when CLR is active
Programming signal specifying the number of bits for the scaling down operation, loaded
when CLR is active
Real component of input data X, in two’s complement format
Imaginary component of input data X, in two’s complement format
Input data X block start signal, active HIGH, associated with the first input data of the 64-
point block. The remaining data of the 64-point data block is loaded into the core in the fol-
lowing clock cycles in the natural order.
Output data Y enable control, active HIGH
Output signal indicating loading X is in Progress. XBIP goes to HIGH the next clock cycle when XBS
is active and returns to LOW when the last data of the 64-point block is loaded into the core. XBS is
ignored when it is HIGH.
Output signal indicating the transform in progress (busy). It goes to HIGH the next clock cycle when
the last data of the 64-point block is loaded into the core and returns to LOW when the core is ready to
accept the next input data block. XBS is ignored when it is HIGH.
nk
−
Table 1: CS2461 - 64-Point FFT/IFFT Interface Signal Definitions
, k=0, 1, 2, ...N-1
2 j
, k=0, 1, 2, ...N-1
π
/
N
of
.
FFT
p
-point discrete
and
IFFT
[1]
[2]
is
Figure 2 and Table 1 provide the CS2461 block based 64-point FFT/
IFFT core symbol, and the I/O interface descriptions respectively.
Unless otherwise stated, all signals are active high and bit(0) is the
least significant bit.
Figure 2: CS2461 Symbol
CLK
CLR
XBS
IFFT
SDC
XRe
Xlm
YEnab
NotRST
Description
3
12
12
AND PIN DESCRIPTION
CS2461 SYMBOL
FFT/IFFT
64-Point
CS2461
12
12
Busy
Done
YBS
YAV
YOV
XBIP
YRe
Ylm