S3055 AMCC (Applied Micro Circuits Corp), S3055 Datasheet
S3055
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S3055 Summary of contents
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... The low jitter LVPECL interface is compliant with the bit-error rate requirements of the Bellcore and ITU-T standards. The S3055 is packaged in a 324 FC-PBGA, offering designers a small package outline. The S3055 is also available in die form. OTX ORX OTX ORX ® ...
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... Table 1 shows the sug- gested interface devices for the S3055. 2 SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR The S3055 is divided into a transmitter section and a receiver section. The sequence of operations is as follows: Transmitter Operations: 1. 16-bit parallel input 2 ...
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... SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR Figure 2. S3055 Transceiver Functional Block Diagram PHINITP/N TXCLK_SEL SYNTHE- REFCLKP/N POCLKP/N (Internal) RLPTIME BYPASSCLKP/N TXCAP1 TXCAP2 BYPASS TESTEN PINP/N[15:0] PICLKP/N SLPTIME LLEB KILLRXCLKB BACKUP REFERENCE GENERATOR TXDP/N (Internal) RSDP/N CDR RXCAP1 RXCAP2 DLEB LCKREFN SDLVTTL SDLVPECL ...
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... S3055 S3055 TRANSCEIVER FUNCTIONAL DESCRIPTION TRANSMITTER OPERATION The S3055 transceiver chip performs the serializa- tion stage in the processing of a transmit SONET STS-48 data stream. It converts 16-bit parallel data to bit serial format at 2488.32 Mbps. A high-frequency bit clock can be generated from a 155.52 MHz frequency reference by using an inte- ...
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... PHERR will go inactive when the realignment is complete. RECEIVER OPERATION The S3055 transceiver chip provides the first stage of the digital processing of a receive SONET STS-48 bit-serial stream. It converts the bit-serial 2.488 Gbps data stream into a 16-bit parallel data format. A loopback mode is provided for diagnostic loopback (transmitter to receiver) ...
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... Loop Timing In Serial Loop Timing (SLPTIME) mode, the clock synthesizer PLL of the S3055 is bypassed, and the timing of the entire transmitter section is controlled by the Receive Serial Clock, RSCLKP/N. This mode is entered by setting the SLPTIME input to a TTL high level ...
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... SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR CDR CHARACTERISTICS Performance The S3055 CDR PLL complies with the jitter specifi- cations proposed for SONET/SDH equipment defined by the Bellcore Specifications: GR-253- CORE, Issue 2, December 1995 and ITU-T Recommendations: G.958 document, when used as specified. Input Jitter Tolerance ...
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... S3055 Table 3. S3055 Transmitter Pin Assignment and Descriptions ...
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... SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR Table 3. S3055 Transmitter Pin Assignment and Descriptions (Continued ...
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... S3055 Table 4. S3055 Receiver Pin Assignment and Descriptions ...
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... SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR Table 4. S3055 Receiver Pin Assignment and Descriptions (Continued ...
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... S3055 Table 5. S3055 Common Pin Assignment and Descriptions ...
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... SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR Table 5. S3055 Common Pin Assignment and Descriptions (Continued ...
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... S3055 Table 5. S3055 Common Pin Assignment and Descriptions (Continued ...
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... SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR Figure 5. S3055 Pinout BottomView ...
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... S3055 Figure 6. S3055 Pinout Top View ...
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... Table 6. Thermal Management Note: S3055 requires an airflow of 300 LFPM for an industrial operating temperature airflow or heatsink is required for a commercial operating temperature January 31, 2002 / Revision ˚ 4 ...
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... S3055 Table 7. Performance Specifications ...
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... Table 9. Absolute Maximum Ratings The following are the absolute maximum stress ratings for S3055 device. Stresses beyond those listed may cause permanent damage to the device. Absolute maximum ratings are stress ratings only and operation of the device at the maximums stated or any other conditions beyond those indicated in the “ ...
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... S3055 Table 11. LVTTL Input/Output DC Characteristics ...
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... S3055 ...
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... S3055 Table 14. Single-Ended LVPECL Input DC Characteristics Table 15. Differential CML Output DC Characteristics ...
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... Figure 9. Transmitter Output Timing TSCLKP TSD TSD tH TSD S3055 ...
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... Figure 10. Receiver Output Timing Diagram POCLKP POUTP/N[15:0] Notes on Timing: 1. Timing is measured from the crossover point of the clock to the crossover point of the data. Figure 11. S3055 155.52 MHz REFCLK Phase Noise Limit -60 -80 -100 -120 -140 -160 100 1,000 24 SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR ...
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... V(+) V(–) V(+) – V(-) 0.0V Note: V(+) – V(-) is the algebraic difference of the input signals. Figure 13. Phase Adjust Timing PHERR PHINIT PCLKP PICLKP TRANSFER CLK (Internal) 1. The byte clock = 155.52 MHz. January 31, 2002 / Revision D V SINGLE V DIFF = SINGLE 1 4-10 BYTE CLOCKS 2 BYTE CLOCKS S3055 25 ...
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... Figure 14. Differential CML Output to +5V/+3.3V PECL Input AC Coupled Termination +1.8 V S3055 TSDP/N TSCLKP/N Figure 15. Differential LVPECL Driver to LVPECL Input Termination S3055 POUTP/N[15:0] / POCLKP/N PCLKP/N / PHERRP/N 155/77 MCKP/N Figure 16. Differential LVPECL Driver to Differential LVPECL Input Termination S3055 POUTP/N[15:0] / POCLKP/N PCLKP/N / PHERRP/N 155/77MCKP/N 26 SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR 0.01 F Zo=50 Zo=50 0.01 F +3.3 V ...
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... SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR Figure 17. +5V Differential PECL Driver to S3055 Differential CML Input AC Coupled Termination +3.3/5 V Figure 18. +5V Differential PECL Driver to S3055 Differential LVPECL Reference Clock Input AC Coupled Termination +5 V 155 MHZ OSCILLATOR Figure 19. +3V Differential LVPECL Driver to S3055 Differential LVPECL Reference Clock Input DC Coupled Termination +3 ...
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... S3055 Figure 20. Differential LVPECL Driver to S3055 Internally Biased Differential LVPECL Inputs +3.3 V Figure 21. External Loop Filter Components 51 RXCAP1 28 SONET/SDH/ATM OC-48 16 BIT TRANSCEIVER WITH CDR Vcc3.3 -0.5 V Zo=50 100 Zo=50 Vcc3.3 -0 150 RXCAP2 TXCAP1 +3.3 V S3055 PINP/N[15:0] PICLKP/N PHINITP 150 TXCAP2 January 31, 2002 / Revision D ...
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... USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. AMCC is a registered trademark of Applied Micro Circuits Corporation. January 31, 2002 / Revision XXXX X XX Prefix Part No. Package (S3055 PB) http://www.amcc.com Copyright ® 2002 Applied Micro Circuits Corporation S3055 ...