IDT82P2284 Integrated Device Technology, Inc., IDT82P2284 Datasheet - Page 59
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IDT82P2284
Manufacturer Part Number
IDT82P2284
Description
4 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet
1.IDT82P2284.pdf
(384 pages)
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IDT82P2284
means there is an interrupt. The interrupt will be reported by the INT pin
if its Interrupt Enable bit is ‘1’.
Functional Description
Table 31: Related Bit / Register In Chapter 3.11.2
ADRM[1:0]
RHDLCM
LSSUFIL
DAT[7:0]
FISUFIL
RMBEE
HA[7:0]
OVFLE
LA[7:0]
RMBEI
OVFLI
RRST
PACK
EMP
Bit
RHDLC1 Interrupt Control / RHDLC2 Interrupt Control / RHDLC3 Interrupt
RHDLC1 High Address / RHDLC2 High Address / RHDLC3 High Address
RHDLC1 Control Register / RHDLC2 Control Register / RHDLC3 Control
RHDLC1 Low Address / RHDLC2 Low Address / RHDLC3 Low Address
RHDLC1 Interrupt Indication / RHDLC2 Interrupt Indication / RHDLC3
RHDLC1 Data / RHDLC2 Data / RHDLC3 Data
RHDLC1 RFIFO Access Status /
Interrupt Indication
Register
Register
Control
48
to ‘1’ on the RRST bit. The reset will clear the FIFO, the PACK bit and
the EMP bit.
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
The HDLC Receiver will be reset when there is a transition from ‘0’
098, 198, 298, 398 / 099, 199, 299, 399 / 09A, 19A, 29A, 39A, 49A
09B, 19B, 29B, 39B / 09C, 19C, 29C, 39C / 09D, 19D, 29D, 39D
0A1, 1A1, 2A1, 3A1 / 0A2, 1A2, 2A2, 3A2 / 0A3, 1A3, 2A3, 3A3
0A4, 1A4, 2A4, 3A4 / 0A5, 1A5, 2A5, 3A5 / 0A6, 1A6, 2A6, 3A6
09E, 19E, 29E, 39E / 09F, 19F, 29F, 39F / 0A0, 1A0, 2A0, 3A0
092, 192, 292, 392 / 093, 193, 293, 393 / 094, 194, 294, 394
095, 195, 295, 395 / 096, 196, 296, 396 / 097, 197, 297, 397
Address (Hex)
March 22, 2004
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