L64733 LSI Logic Corporation, L64733 Datasheet - Page 10

• Manufacturer Part Number: L64733
• Description: Tuner/receiver Chipset
• Manufacturer: LSI Logic Corporation

Control Signals
10
XTLOUT
The following signals, some of which are generated by the L64734 IC,
control the mode of operation of the L64733 IC.
AGC1
AGC2
CPG[2:1]
FDOUB
FLCLK
IDCn, IDCp
L64733/L64734 Tuner and Satellite Receiver Chipset
Crystal Out
This signal provides a buffered clock reference frequency
for driving the L64734 XOIN pin.
Automatic Gain Control 1
The AGC1 signal is a high-impedance input from the
L64734; it controls the RF AGC circuitry. The AGC1
voltage range is from 0.5 V to 4.8 V.
Automatic Gain Control 2
The AGC2 signal is a high-impedance input from the
L64734; it controls RF AGC circuitry.
Charge Pump Gain
The CPG[2:1] signals set the charge pump gain
according to the following table.
Frequency Doubler
When the FDOUB signal is asserted, the L64733 local
oscillator frequency is internally doubled and fed to the
mixers. When the FDOUB signal is deasserted, the
oscillator frequency is not doubled before being fed to the
mixers.
Filter Clock
The FLCLK signal is a low-amplitude, self-biased clock
input. The frequency of the FLCLK signal multiplied by 16
is the baseband filter’s 3 dB frequency.
I-Channel DC Offset Correction
Connect a 0.1 F (or larger) capacitor between the IDCp
and IDCn signals.
CPG1
0
0
1
1
CPG2
0
1
0
1
Charge Pump Current (typ), mA
FB HIGH
0.1
0.3
0.6
1.8
FB LOW
0.1
0.3
0.6
1.8
Output
Input
Input
Input
Input
Input
Input