L64733 LSI Logic Corporation, L64733 Datasheet - Page 27
L64733
Manufacturer Part Number
L64733
Description
Tuner/receiver Chipset
Manufacturer
LSI Logic Corporation
Datasheet
1.L64733.pdf
(48 pages)
- Current page: 27 of 48
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Table 4
Parameter
RF Front End
RFIN Input Frequency
Range
RFIN Single-Carrier
Input Power
AGC1 Range
AGC2 Range
RFIN referred IP3
(front-end contributions)
Baseband 1 dB
Compression Point
RFIN Referred IP2
Noise Figure
RFIN Worst Case
Return Loss
LO Leakage Power
at RFIN
Second Harmonic
Rejection
Half-Harmonic Rejection
and x 1.5 Harmonic
Rejection
Loop Through
Gain
(Sheet 1 of 3)
1, 2
AC Characteristics of the L64733
L64733/L64734 Tuner and Satellite Receiver Chipset
Condition
Meets all following AC specs
RF level needed to produce 0.59 V
1 V < AGC1 < 4 V
1 V < AGC2 < 4 V
AGC1 gain set for
(0.59 V
AGC2 set to maximum
gain (V
signals at FLO
+ 32 MHz, FLO
+ 72 MHz
IOUTp, IOUTn, QOUTp, QOUTn have
1 signal within filter BW
PRFIN = 25 dBm, F
At maximum gain AGC1, AGC2
Complex “75
board, connector parasitics.
950 MHz to 2150 MHz, subject to
board layout
Due to LO-generated 2nd harmonic
Due to RFIN-generated 2nd harmonic
25 dBm input level
AGC2
PP
output), and
= 1 V). 2
source” subject to
LO
= 951 MHz
@2175 MHz
@1550 MHz
@925 MHz
@2175 MHz
@1550 MHz
@925 MHz
PP
Min
925
50
19
27
65
–
–
–
2
–
–
–
–
–
–
15.5
11.5
Typ
2.5
1.8
0.8
11
27
–
–
–
–
3
7
8
–
65
–
2175
Max
25
–
–
–
–
–
–
–
–
–
–
–
–
–
1
Units
MHz
dBm
dBm
dBm
dBm
dBm
dBm
V
dB
dB
dB
dB
dB
dB
dB
27
PP
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