L64733 LSI Logic Corporation, L64733 Datasheet - Page 20

• Manufacturer Part Number: L64733
• Description: Tuner/receiver Chipset
• Manufacturer: LSI Logic Corporation

20
MODn, MODp Modulus Selector
PLLINn, PLLINp
PSOUTn, PSOUTp
RESO_LVDS LVDS Buffers Precision Resistor
VREF_LVDS
L64733/L64734 Tuner and Satellite Receiver Chipset
These signals are low-voltage differential signals from the
L64734 modulus selector programmable counter (A). The
signals are clocked by PSOUT. A positive MODp with
respect to MODn selects a divide by 32 at the dual
modulus prescaler on the L64733 Tuner IC. A negative
MODp with respect to MODn selects a divide by 33.
Counter A can be programmed to count down from a
particular value by register bit programming.
PLL Differential Counter M
These signals are low-voltage differential signals from the
L64734 programmable synthesizer counter (M). The
signals are clocked by PSOUT. PLLINp is positive with
respect to PLLINn for one PSOUT cycle. The repetition
rate is 0.5 MHz for a 4 MHz reference crystal. The
counter M can be programmed to count down from a
particular value by register bit programming.
Prescaler Output
These signals are differential signals to the L64734 from
the L64733. The programmable counters on the L64734
are clocked on the rising edge of the PSOUT signal.
The RESO_LVDS output must be connected to a resistor
(6.8 k
buffers used to drive the differential signals MODp,
MODn, and PLLINp, PLLINn. Connect the other side of
the resistor to ground.
LVDS Buffers Reference Voltage
The VREF_LVDS input is a 1.2 V 10% voltage level that
controls the common mode voltage of the LVDSOUT
buffers used to drive the differential signals MODp,
MODn, and PLLINp, PLLINn.
5%) that controls the swing of the LVDSOUT
Output
Output
Output
Output
Input