L64733 LSI Logic Corporation, L64733 Datasheet - Page 37

no-image

L64733

Manufacturer Part Number
L64733
Description
Tuner/receiver Chipset
Manufacturer
LSI Logic Corporation
Datasheet
Figure 9
Output
Synchronous timing is shown in
have a setup and hold relationship with respect to the clock signal that
samples them. Synchronous outputs have a delay from the clock edge
that asserts them.
Figure 10
OUTPUTS
The reset pulse requirements are shown in
Figure 11
RESET
L64733/L64734 Tuner and Satellite Receiver Chipset
BCLKOUT
55 pF
INPUTS
PCLK
Point
Test
AC Test Load and Waveforms for 3-State Outputs
L64734 Synchronous AC Timing
L64734 RESET Timing Diagram
Iref = 20 mA
Iref = -20 mA
2
5
6
1
Vref = 1.5 V
7
3
4
Vref
Figure
2.5 V
0.5 V
10. Synchronous inputs must
8
Figure
11.
V
0.5 V
DD
– 0.5 V
37

Related parts for L64733