L64733 LSI Logic Corporation, L64733 Datasheet - Page 19

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L64733

Manufacturer Part Number
L64733
Description
Tuner/receiver Chipset
Manufacturer
LSI Logic Corporation
Datasheet
Microcontroller Interface
Synthesizer Control Interface
FSTARTOUT Frame Start Output
The Microcontroller interface connects the L64734 to an external
microcontroller.
INTn
SADR[1:0]
SCLK
SDATA
The Synthesizer Control interface lets the L64734 control the L64733
frequency synthesizer.
FDOUB
L64733/L64734 Tuner and Satellite Receiver Chipset
if the error condition is removed. The ERROROUTn
signal is exactly aligned with the output data stream; it is
asserted after the FEC_RST register bit is set.
The L64734 asserts the FSTARTOUT signal during the
first bit of every frame with valid data in Serial Channel
output mode, and during the first byte in Parallel Channel
output mode. FSTARTOUT is valid only when the
DVALIDOUT signal is asserted. The FSTARTOUT signal
is deasserted after the FEC_RST register bit is set.
Interrupt
The L64734 asserts INTn when an internal, unmasked
interrupt flag is set. The INTn signal remains asserted as
long as the interrupt condition persists and the interrupt
flag is not masked.
Serial Address
The SADR[1:0] signals are the two programmable bits of
the serial address for the L64734.
Serial Clock
This is the serial clock pin for a two-wire serial protocol.
Serial Data
This is the serial data pin for a two-wire serial protocol.
Frequency Doubler
When FDOUB is asserted, the frequency doubler on the
L64733 Tuner IC is enabled. When FDOUB is
deasserted, the frequency doubler is disabled. This
output is set by register programming.
Bidirectional
Bidirectional
Output
Output
Output
Input
19

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